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[209.132.180.67]) by mx.google.com with ESMTP id d34si1366756pgd.558.2019.06.06.00.06.51; Thu, 06 Jun 2019 00:07:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XE2mWnWb; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726721AbfFFHFb (ORCPT + 99 others); Thu, 6 Jun 2019 03:05:31 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:34411 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725267AbfFFHFa (ORCPT ); Thu, 6 Jun 2019 03:05:30 -0400 Received: by mail-lf1-f66.google.com with SMTP id y198so748700lfa.1 for ; Thu, 06 Jun 2019 00:05:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=LxUuoqEbUmgmnRX9vLQxQ/tQ09ZsJx159pAs1BZjQQw=; b=XE2mWnWbAi156xacpzGakgxd0XdnPCTjLko9UBbfOxI68vIwEY1UqU3DdVepHT2unK IXFQuljTyQaBE63iTT06aLL+Gabw06PozTCJJyXbmKvvVShYaCMrd+a5URAFB89lEIrU oH3FnL+nYHmx42QzFDxG5r+oZSqRevKAxlp0V/DFV++C/3xPhMUC2Woo4QjnWcxAJlx8 I81qqKzeu0gdR3REUvOrz+2QwvtvK3yIaokulPtppIRatORNpAjdXcyB35p+xAEy9RmN y4ND6KqQT11fRSwVqXg03KLBPqqJX4YYaH2X4ZLxkTZKD4Y39fNVQOdJy8bB0sRlmd6C qLgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=LxUuoqEbUmgmnRX9vLQxQ/tQ09ZsJx159pAs1BZjQQw=; b=omyWHAenV/r5CRrmGeDM4ebZLG5Vs427NU7vIuKCu0ckeJQmzKh28QgikGA3b+UVFe YTfCO3MQYHpNbENHPzD2ffR+hLV9kjeLBpHyoqXUkN4puYkKvkwdl+UsV7kLL0woAZfX Bz4sUiSjfpAarqXJi3SGRr5tI62jRNIk3fJSF5luiAqCRoLIrSrhOroVEUQapCFzaGru emFjlqtXY2yivkl8Xa4X9rMa43kvqM5wlPQ/hrUZmhwZ6lVoIPcDji+8YOGXh6S5e+4x o0h05/cZiNF09tLmx5h3WhsO65gE98oau7EhyDlMfiTUekNa49rJXJJST61GObrLsn+8 4nQw== X-Gm-Message-State: APjAAAUUjJIdT86UgcMDPzGN2WMrKGl7J93ht0hoihDke/qzfju0bdLd yVaisEZPyV+mBEdzx4QbVfhYa5QPoLdaWm48bLLw1Q== X-Received: by 2002:a19:2892:: with SMTP id o140mr9068556lfo.177.1559804728178; Thu, 06 Jun 2019 00:05:28 -0700 (PDT) MIME-Version: 1.0 References: <20190114184255.258318-1-mka@chromium.org> <155786856719.14659.2902538189660269078@swboyd.mtv.corp.google.com> <5cdf2dc8.1c69fb81.521c8.9339@mx.google.com> <20190605172048.ahzusevvdxrpnebk@queper01-ThinkPad-T460s> In-Reply-To: <20190605172048.ahzusevvdxrpnebk@queper01-ThinkPad-T460s> From: Vincent Guittot Date: Thu, 6 Jun 2019 09:05:16 +0200 Message-ID: Subject: Re: [PATCH] arm64: dts: sdm845: Add CPU topology To: Quentin Perret Cc: Stephen Boyd , Amit Kucheria , Andy Gross , Matthias Kaehlcke , David Brown , Rob Herring , Mark Rutland , linux-arm-msm , "open list:ARM/QUALCOMM SUPPORT" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , Douglas Anderson , Rajendra Nayak Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Quentin, On Wed, 5 Jun 2019 at 19:21, Quentin Perret wrote: > > On Friday 17 May 2019 at 14:55:19 (-0700), Stephen Boyd wrote: > > Quoting Amit Kucheria (2019-05-16 04:54:45) > > > (cc'ing Andy's correct email address) > > > > > > On Wed, May 15, 2019 at 2:46 AM Stephen Boyd wrote: > > > > > > > > Quoting Amit Kucheria (2019-05-13 04:54:12) > > > > > On Mon, May 13, 2019 at 4:31 PM Amit Kucheria wrote: > > > > > > > > > > > > On Tue, Jan 15, 2019 at 12:13 AM Matthias Kaehlcke wrote: > > > > > > > > > > > > > > The 8 CPU cores of the SDM845 are organized in two clusters of 4 big > > > > > > > ("gold") and 4 little ("silver") cores. Add a cpu-map node to the DT > > > > > > > that describes this topology. > > > > > > > > > > > > This is partly true. There are two groups of gold and silver cores, > > > > > > but AFAICT they are in a single cluster, not two separate ones. SDM845 > > > > > > is one of the early examples of ARM's Dynamiq architecture. > > > > > > > > > > > > > Signed-off-by: Matthias Kaehlcke > > > > > > > > > > > > I noticed that this patch sneaked through for this merge window but > > > > > > perhaps we can whip up a quick fix for -rc2? > > > > > > > > > > > > > > > > And please find attached a patch to fix this up. Andy, since this > > > > > hasn't landed yet (can we still squash this into the original patch?), > > > > > I couldn't add a Fixes tag. > > > > > > > > > > > > > I had the same concern. Thanks for catching this. I suspect this must > > > > cause some problem for IPA given that it can't discern between the big > > > > and little "power clusters"? > > > > > > Both EAS and IPA, I believe. It influences the scheduler's view of the > > > the topology. > > > > And EAS and IPA are OK with the real topology? I'm just curious if > > changing the topology to reflect reality will be a problem for those > > two. > > FWIW, neither EAS nor IPA depends on this. Not the upstream version of > EAS at least (which is used in recent Android kernels -- 4.19+). > > But doing this is still required for other things in the scheduler (the > so-called 'capacity-awareness' code). So until we have a better > solution, this patch is doing the right thing. I'm not sure to catch what you mean ? Which so-called 'capacity-awareness' code are you speaking about ? and what is the problem ? Regards, Vincent > > I hope that helps. > > Thanks, > Quentin