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Subject: Re: [PATCH v4] KVM: x86: Add Intel CPUID.1F cpuid emulation support
To:     Like Xu <like.xu@linux.intel.com>, kvm@vger.kernel.org,
        =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= <rkrcmar@redhat.com>
Cc:     Eduardo Habkost <ehabkost@redhat.com>,
        sean.j.christopherson@intel.com, xiaoyao.li@linux.intel.com,
        linux-kernel@vger.kernel.org, like.xu@intel.com
References: <20190606011845.40223-1-like.xu@linux.intel.com>
From:   Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <0dd149a1-cc3b-0ac7-fe91-0a4dabd9c36e@redhat.com>
Date:   Thu, 6 Jun 2019 13:54:25 +0200
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On 06/06/19 03:18, Like Xu wrote:
> Add support to expose Intel V2 Extended Topology Enumeration Leaf for
> some new systems with multiple software-visible die within each package.
> 
> Because unimplemented and unexposed leaves should be explicitly reported
> as zero, there is no need to limit cpuid.0.eax to the maximum value of
> feature configuration but limit it to the highest leaf implemented in
> the current code. A single clamping seems sufficient and cheaper.
> 
> Co-developed-by: Xiaoyao Li <xiaoyao.li@linux.intel.com>
> Signed-off-by: Xiaoyao Li <xiaoyao.li@linux.intel.com>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
> 
> ---
> 
> ==changelog==
> 
> v4:
> - Limited cpuid.0.eax to the highest leaf implemented in KVM
> 
> v3: https://lkml.org/lkml/2019/5/26/64
> - Refine commit message and comment
> 
> v2: https://lkml.org/lkml/2019/4/25/1246
> 
> - Apply cpuid.1f check rule on Intel SDM page 3-222 Vol.2A
> - Add comment to handle 0x1f anf 0xb in common code
> - Reduce check time in a descending-break style
> 
> v1: https://lkml.org/lkml/2019/4/22/28
> ---
>  arch/x86/kvm/cpuid.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index e18a9f9f65b5..f819011e6a13 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -426,7 +426,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
>  
>  	switch (function) {
>  	case 0:
> -		entry->eax = min(entry->eax, (u32)(f_intel_pt ? 0x14 : 0xd));
> +		/* Limited to the highest leaf implemented in KVM. */
> +		entry->eax = min(entry->eax, 0x1f);
>  		break;
>  	case 1:
>  		entry->edx &= kvm_cpuid_1_edx_x86_features;
> @@ -546,7 +547,11 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
>  		entry->edx = edx.full;
>  		break;
>  	}
> -	/* function 0xb has additional index. */
> +	/*
> +	 * Per Intel's SDM, the 0x1f is a superset of 0xb,
> +	 * thus they can be handled by common code.
> +	 */
> +	case 0x1f:
>  	case 0xb: {
>  		int i, level_type;
>  
> 

Queued, thanks.

Paolo