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a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector1-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=BcxPZJ8Cyu/te9TYREK31YISsiKlZdZy+PGqS11EjaY=; b=ibEa8c2ZdjR+V4psqbbKnRn09/cXcDzLPz8Y1y2Ym4XIalh34OeEq/QCNzQY83n518W5Agvb3elC7hOcdCKnOZ+KDyw1w0ItbuAflNtOi+FLDUUzwKA0SVLtaebogQE0WqKs3v4oF5ad1smQuGl8mA7+rsYFXdym5mnZKpk2vlw= Received: from CH2PR02MB6359.namprd02.prod.outlook.com (52.132.231.93) by CH2PR02MB6199.namprd02.prod.outlook.com (52.132.229.225) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1965.12; Thu, 6 Jun 2019 18:27:23 +0000 Received: from CH2PR02MB6359.namprd02.prod.outlook.com ([fe80::b9dd:11e0:7fca:ba55]) by CH2PR02MB6359.namprd02.prod.outlook.com ([fe80::b9dd:11e0:7fca:ba55%5]) with mapi id 15.20.1943.018; Thu, 6 Jun 2019 18:27:23 +0000 From: Dragan Cvetic To: Greg KH CC: "arnd@arndb.de" , Michal Simek , "linux-arm-kernel@lists.infradead.org" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Derek Kiernan Subject: RE: [PATCH V4 10/12] misc: xilinx_sdfec: Add stats & status ioctls Thread-Topic: [PATCH V4 10/12] misc: xilinx_sdfec: Add stats & status ioctls Thread-Index: AQHVEu5G4Eibm0gnKE+3rKpAEh7MYqaOvaYAgABGCVA= Date: Thu, 6 Jun 2019 18:27:23 +0000 Message-ID: References: <1558784245-108751-1-git-send-email-dragan.cvetic@xilinx.com> <1558784245-108751-11-git-send-email-dragan.cvetic@xilinx.com> <20190606141138.GD7943@kroah.com> In-Reply-To: <20190606141138.GD7943@kroah.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=draganc@xilinx.com; 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received-spf: None (protection.outlook.com: xilinx.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: D8q8Z3TukDe/YT/IZHRo7D5w0xDLXSbgnDtOnR9671hSbEsWCC4dg6FOTkpdB2DcJNq823uz4ROxODVvczFuzkkZk2mBxSTE8NoABxY/vlAAyObQq54oySDl07D7bpF85MwPOOUpX5ynBrdG5wr3nGi1k/NGiQSUfxd6IIpbvWlehxFAYxm8VpLyO6gfA6cnXE+cPydMlylNnZZr18ksEx4arJ3mZuagdeTfbbzNExHPNgMRitw4W1M8g0DVjAuIAxGpx/yvrkVZSiPzFix8Sgez0LkfC0PLYXnABa/Lc3l2b2NokTvZTosDjSmPfLwSv9hbpv0jC15zBHjRscgbET66tjP2mLneyC9wBX06YyRLfwcEOwG+DS3VM4s0yFCL2pSUuBvwmPDwysz2E4V+4lT1tkxyb2bigOK4H3cxVEM= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-Network-Message-Id: a46c33e0-cfe8-4622-d241-08d6eaac9e8d X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Jun 2019 18:27:23.2594 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: draganc@xilinx.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB6199 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Greg KH [mailto:gregkh@linuxfoundation.org] > Sent: Thursday 6 June 2019 15:12 > To: Dragan Cvetic > Cc: arnd@arndb.de; Michal Simek ; linux-arm-kernel@li= sts.infradead.org; robh+dt@kernel.org; > mark.rutland@arm.com; devicetree@vger.kernel.org; linux-kernel@vger.kerne= l.org; Derek Kiernan > Subject: Re: [PATCH V4 10/12] misc: xilinx_sdfec: Add stats & status ioct= ls >=20 > On Sat, May 25, 2019 at 12:37:23PM +0100, Dragan Cvetic wrote: > > SD-FEC statistic data are: > > - count of data interface errors (isr_err_count) > > - count of Correctable ECC errors (cecc_count) > > - count of Uncorrectable ECC errors (uecc_count) > > > > Add support: > > 1. clear stats ioctl callback which clears collected > > statistic data, > > 2. get stats ioctl callback which reads a collected > > statistic data, > > 3. set default configuration ioctl callback, > > 4. start ioctl callback enables SD-FEC HW, > > 5. stop ioctl callback disables SD-FEC HW. > > > > In a failed state driver enables the following ioctls: > > - get status > > - get statistics > > - clear stats > > - set default SD-FEC device configuration > > > > Tested-by: Santhosh Dyavanapally > > Tested by: Punnaiah Choudary Kalluri > > Tested-by: Derek Kiernan > > Tested-by: Dragan Cvetic > > Signed-off-by: Derek Kiernan > > Signed-off-by: Dragan Cvetic > > --- > > drivers/misc/xilinx_sdfec.c | 121 +++++++++++++++++++++++++++++++= ++++++++ > > include/uapi/misc/xilinx_sdfec.h | 75 ++++++++++++++++++++++++ > > 2 files changed, 196 insertions(+) > > > > diff --git a/drivers/misc/xilinx_sdfec.c b/drivers/misc/xilinx_sdfec.c > > index 544e746..6e04492 100644 > > --- a/drivers/misc/xilinx_sdfec.c > > +++ b/drivers/misc/xilinx_sdfec.c > > @@ -189,6 +189,7 @@ struct xsdfec_clks { > > * @dev: pointer to device struct > > * @state: State of the SDFEC device > > * @config: Configuration of the SDFEC device > > + * @intr_enabled: indicates IRQ enabled > > * @state_updated: indicates State updated by interrupt handler > > * @stats_updated: indicates Stats updated by interrupt handler > > * @isr_err_count: Count of ISR errors > > @@ -207,6 +208,7 @@ struct xsdfec_dev { > > struct device *dev; > > enum xsdfec_state state; > > struct xsdfec_config config; > > + bool intr_enabled; > > bool state_updated; > > bool stats_updated; > > atomic_t isr_err_count; > > @@ -290,6 +292,26 @@ static int xsdfec_dev_release(struct inode *iptr, = struct file *fptr) > > return 0; > > } > > > > +static int xsdfec_get_status(struct xsdfec_dev *xsdfec, void __user *a= rg) > > +{ > > + struct xsdfec_status status; > > + int err; > > + > > + status.fec_id =3D xsdfec->config.fec_id; > > + spin_lock_irqsave(&xsdfec->irq_lock, xsdfec->flags); > > + status.state =3D xsdfec->state; > > + xsdfec->state_updated =3D false; > > + spin_unlock_irqrestore(&xsdfec->irq_lock, xsdfec->flags); > > + status.activity =3D (xsdfec_regread(xsdfec, XSDFEC_ACTIVE_ADDR) & > > + XSDFEC_IS_ACTIVITY_SET); > > + > > + err =3D copy_to_user(arg, &status, sizeof(status)); > > + if (err) > > + err =3D -EFAULT; > > + > > + return err; > > +} > > + > > static int xsdfec_get_config(struct xsdfec_dev *xsdfec, void __user *a= rg) > > { > > int err; > > @@ -850,6 +872,80 @@ static int xsdfec_cfg_axi_streams(struct xsdfec_de= v *xsdfec) > > return 0; > > } > > > > +static int xsdfec_start(struct xsdfec_dev *xsdfec) > > +{ > > + u32 regread; > > + > > + regread =3D xsdfec_regread(xsdfec, XSDFEC_FEC_CODE_ADDR); > > + regread &=3D 0x1; > > + if (regread !=3D xsdfec->config.code) { > > + dev_dbg(xsdfec->dev, > > + "%s SDFEC HW code does not match driver code, reg %d, code %d", > > + __func__, regread, xsdfec->config.code); > > + return -EINVAL; > > + } > > + > > + /* Set AXIS enable */ > > + xsdfec_regwrite(xsdfec, XSDFEC_AXIS_ENABLE_ADDR, > > + XSDFEC_AXIS_ENABLE_MASK); > > + /* Done */ > > + xsdfec->state =3D XSDFEC_STARTED; > > + return 0; > > +} > > + > > +static int xsdfec_stop(struct xsdfec_dev *xsdfec) > > +{ > > + u32 regread; > > + > > + if (xsdfec->state !=3D XSDFEC_STARTED) > > + dev_dbg(xsdfec->dev, "Device not started correctly"); > > + /* Disable AXIS_ENABLE Input interfaces only */ > > + regread =3D xsdfec_regread(xsdfec, XSDFEC_AXIS_ENABLE_ADDR); > > + regread &=3D (~XSDFEC_AXIS_IN_ENABLE_MASK); > > + xsdfec_regwrite(xsdfec, XSDFEC_AXIS_ENABLE_ADDR, regread); > > + /* Stop */ > > + xsdfec->state =3D XSDFEC_STOPPED; > > + return 0; > > +} > > + > > +static int xsdfec_clear_stats(struct xsdfec_dev *xsdfec) > > +{ > > + atomic_set(&xsdfec->isr_err_count, 0); > > + atomic_set(&xsdfec->uecc_count, 0); > > + atomic_set(&xsdfec->cecc_count, 0); >=20 > Atomics for counters? Are you sure? Don't we have some sort of sane > counter api these days for stuff like this instead of abusing atomic > variables? What does the networking people use? How often/fast do > these change that you need to synchronize things? Accepted. No need to have them atomic. They are lock protected already. >=20 > > + > > + return 0; > > +} > > + > > +static int xsdfec_get_stats(struct xsdfec_dev *xsdfec, void __user *ar= g) > > +{ > > + int err; > > + struct xsdfec_stats user_stats; > > + > > + spin_lock_irqsave(&xsdfec->irq_lock, xsdfec->flags); > > + user_stats.isr_err_count =3D atomic_read(&xsdfec->isr_err_count); > > + user_stats.cecc_count =3D atomic_read(&xsdfec->cecc_count); > > + user_stats.uecc_count =3D atomic_read(&xsdfec->uecc_count); > > + xsdfec->stats_updated =3D false; > > + spin_unlock_irqrestore(&xsdfec->irq_lock, xsdfec->flags); >=20 > Wait, you just grabbed a lock, and then read atomic variables, why? Why > do these need to be atomic variables if you are already locking around > them? Unless you want to be "extra sure" they are safe? :) Accepted. Absolutely no need for atomic variables. =20 >=20 > Please fix up. >=20 > thanks, >=20 > greg k-h