Received: by 2002:a25:ab43:0:0:0:0:0 with SMTP id u61csp85827ybi; Fri, 7 Jun 2019 04:38:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqwc22Rpq8eO/kTAYZNmpfxTyuRcbEv101+1cWjayfT1+a+VoZH1U2rI4wksPKwpCh/XhLXq X-Received: by 2002:a62:8c97:: with SMTP id m145mr57479014pfd.62.1559907524472; Fri, 07 Jun 2019 04:38:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559907524; cv=none; d=google.com; s=arc-20160816; b=qGRpwBbn2Tdm55bqFDgvJJgxA9R9EVrm2Kx5H41lF4yNTNmHrmrbmZtCLaTo4bAukE aY5Wl46MP9u+N/M/+0VfKN4Gp8/Ndos6L1ZAP2+8J1dJyXuzOrXTEeTPu6EyKDS6S6gq CrujsOy6D1EnYkwwRfPE+Q2uJshfoPYmAAK9Y6itV8NSxp1ziNv1V/poG9AGt6o+i8ho Tq02ut1EyjccqttXHfJyadT1jrXkwCggtn0tBWnjTbuuh16r+D4mUzaQSi5b8D8RRckJ VnrPEyIA7xQk1Lz+OJodi/bzZ6QjVVXl9Z+nXWslguwoC+mqIhdSR9Ew2BVtmWMtnb4/ oGoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=pcx+0g+IU0Y4hvDHMjeqgcONGRVrOddYF5elH1fQ4SA=; b=lPAN/Qj8blpDxFXmwQj1JaRbif/iDTKNnN/ISVKeqSz7BIdEdkn8MRv/kXGfkFggkU zFh6hebTBgPNAmDaUwUnpnfHSs6vYAXSWmymQc/EWyoouZC7iqo9NSZTuk5037G2CAEN 9KZZdDl45nxABNAvvUN3skRrGW61SKMtWR1vu2d5ZmkzSo2VuvJeY2V/7Y6BeRRiQVc3 VICkUKsk60y271mp9CzlDQyzq8DYuCFwKYlkgX5IGai4xEZRn3vAbgY3jVgB+GTC1LEx cjBOyMAE8EDLN2bBZvdCriCPlG6buxhU7JnfjiMDa5o6geTANonmezjtzoPk4GoyPRfP 5wOA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t4si1516620pjo.24.2019.06.07.04.38.27; Fri, 07 Jun 2019 04:38:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727843AbfFGL1j (ORCPT + 99 others); Fri, 7 Jun 2019 07:27:39 -0400 Received: from andre.telenet-ops.be ([195.130.132.53]:58086 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727143AbfFGL1j (ORCPT ); Fri, 7 Jun 2019 07:27:39 -0400 Received: from ramsan ([84.194.111.163]) by andre.telenet-ops.be with bizsmtp id MnTd2000S3XaVaC01nTdMf; Fri, 07 Jun 2019 13:27:38 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1hZD21-0004F4-Jl; Fri, 07 Jun 2019 13:27:37 +0200 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1hZD21-0003eb-Ib; Fri, 07 Jun 2019 13:27:37 +0200 From: Geert Uytterhoeven To: Hannes Reinecke , "James E . J . Bottomley" , "Martin K . Petersen" , Jiri Kosina Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH trivial] [SCSI] aic7xxx: Spelling s/configuraion/configuration/ Date: Fri, 7 Jun 2019 13:27:36 +0200 Message-Id: <20190607112736.14004-1-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Geert Uytterhoeven --- drivers/scsi/aic7xxx/aic7xxx.reg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/aic7xxx/aic7xxx.reg b/drivers/scsi/aic7xxx/aic7xxx.reg index ba0b411d03e2e1fa..00fde2243e486cbd 100644 --- a/drivers/scsi/aic7xxx/aic7xxx.reg +++ b/drivers/scsi/aic7xxx/aic7xxx.reg @@ -1666,7 +1666,7 @@ scratch_ram { size 6 /* * These are reserved registers in the card's scratch ram on the 2742. - * The EISA configuraiton chip is mapped here. On Rev E. of the + * The EISA configuration chip is mapped here. On Rev E. of the * aic7770, the sequencer can use this area for scratch, but the * host cannot directly access these registers. On later chips, this * area can be read and written by both the host and the sequencer. -- 2.17.1