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From:   Abel Vesa <abel.vesa@nxp.com>
To:     Mark Rutland <mark.rutland@arm.com>
CC:     Abel Vesa <abelvesa@gmail.com>, Rob Herring <robh+dt@kernel.org>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
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        Marc Zyngier <marc.zyngier@arm.com>,
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        <linux-arm-kernel@lists.infradead.org>,
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        Carlo Caione <ccaione@baylibre.com>
Subject: Re: [RFC 0/2] Add workaround for core wake-up on IPI for i.MX8MQ
Thread-Topic: [RFC 0/2] Add workaround for core wake-up on IPI for i.MX8MQ
Thread-Index: AQHVH4Y/3naZJOmQTkOgrNdQmlNuA6aU3y6AgAACvgA=
Date:   Mon, 10 Jun 2019 13:29:11 +0000
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On 19-06-10 14:19:21, Mark Rutland wrote:
> On Mon, Jun 10, 2019 at 03:13:44PM +0300, Abel Vesa wrote:
> > This is another alternative for the RFC:
> > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Flkm=
l.org%2Flkml%2F2019%2F3%2F27%2F545&amp;data=3D02%7C01%7Cabel.vesa%40nxp.com=
%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%=
7C1%7C636957695741584637&amp;sdata=3Dd3X0xyWiaotq4VPNW306wdRhsY4TI%2BBjRSAB=
k6vzf%2B8%3D&amp;reserved=3D0
> >=20
> > This new workaround proposal is a little bit more hacky but more contai=
ned
> > since everything is done within the irq-imx-gpcv2 driver.
> >=20
> > Basically, it 'hijacks' the registered gic_raise_softirq __smp_cross_ca=
ll
> > handler and registers instead a wrapper which calls in the 'hijacked'=20
> > handler, after that calling into EL3 which will take care of the actual
> > wake up. This time, instead of expanding the PSCI ABI, we use a new ven=
dor SIP.
>=20
> IIUC from last time [1,2], this erratum affects all interrupts
> targetting teh idle CPU, not just IPIs, so even if the bodge is more
> self-contained, it doesn't really solve the issue, and there are still
> cases where a CPU will not be woken from idle when it should be (e.g.
> upon receipt of an LPI).
>=20

Wrong, this erratum does not affect any other type of interrupts, other
than IPIs. That is because all the other interrupts go through GPC,
which means the cores will wake up on any other type (again, other than IPI=
).

> IIUC, Marc, Lorenzo, and Rafael [1,2,3] all thought that that this was
> not worthwhile. What's changed?

The fact that this is done in the imx-gpcv2 driver and it's not spread
around like the old RFC. Yes, I agree that fixing something like this
from the core subsystems (like cpuidle) or irq-gic-v3 driver is a bad
idea, but this is not the case anymore with this new RFC.

>=20
> Thanks,
> Mark.
>=20
> [1] https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fl=
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om%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C=
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>=20
> >=20
> > I also have the patches ready for TF-A but I'll hold on to them until I=
 see if
> > this has a chance of getting in.
> >=20
> > Abel Vesa (2):
> >   irqchip: irq-imx-gpcv2: Add workaround for i.MX8MQ ERR11171
> >   arm64: dts: imx8mq: Add idle states and gpcv2 wake_request broken
> >     property
> >=20
> >  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 20 +++++++++++++++
> >  drivers/irqchip/irq-imx-gpcv2.c           | 42 +++++++++++++++++++++++=
++++++++
> >  2 files changed, 62 insertions(+)
> >=20
> > --=20
> > 2.7.4
> > =