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[209.132.180.67]) by mx.google.com with ESMTP id a8si4068317pls.118.2019.06.10.09.19.48; Mon, 10 Jun 2019 09:20:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="t/3aX0Fv"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391107AbfFJPO1 (ORCPT + 99 others); Mon, 10 Jun 2019 11:14:27 -0400 Received: from mail.kernel.org ([198.145.29.99]:34638 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389999AbfFJPO0 (ORCPT ); Mon, 10 Jun 2019 11:14:26 -0400 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D8139207E0; Mon, 10 Jun 2019 15:14:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1560179666; bh=P0dkD9ENiSJ+hO8sohQ82M4kCSPlYg9QTn6ACh1pGBM=; h=In-Reply-To:References:To:From:Cc:Subject:Date:From; b=t/3aX0FvHhHEPaDvxLC/Zt72Z7M8KIX/RV4nCGE26f5wvCqRAHSDFsqqyMKDezdSK Xl2KSBSHTNZKMlEfsDGPkQTwOxV+jTJYQSxnTn5KPI5682IJHA0IEh2WBH09u9Pabp UNDXWvPZA+0vbsuahyuhEOhz5rGFaIGoHZHPVXOY= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: References: <20190604015928.23157-1-Anson.Huang@nxp.com> <20190604015928.23157-3-Anson.Huang@nxp.com> <20190606162543.EFFB820645@mail.kernel.org> <20190607180039.611C7208C0@mail.kernel.org> To: "bjorn.andersson@linaro.org" , "catalin.marinas@arm.com" , "devicetree@vger.kernel.org" , "dinguyen@kernel.org" , "enric.balletbo@collabora.com" , "festevam@gmail.com" , "horms+renesas@verge.net.au" , "jagan@amarulasolutions.com" , "kernel@pengutronix.de" , "l.stach@pengutronix.de" , "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "mark.rutland@arm.com" , "maxime.ripard@bootlin.com" , "mturquette@baylibre.com" , "olof@lixom.net" , "robh+dt@kernel.org" , "s.hauer@pengutronix .de" , "shawnguo@kernel.org" , "will.deacon@arm.com" , Abel Vesa , Aisheng Dong , Anson Huang , Jacky Bai , Leonard Crestez From: Stephen Boyd Cc: dl-linux-imx Subject: RE: [PATCH V3 3/4] clk: imx: Add support for i.MX8MN clock driver User-Agent: alot/0.8.1 Date: Mon, 10 Jun 2019 08:14:25 -0700 Message-Id: <20190610151425.D8139207E0@mail.kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Anson Huang (2019-06-08 02:58:18) > Hi, Stephen >=20 > > -----Original Message----- > > From: Stephen Boyd > > Sent: Saturday, June 8, 2019 2:01 AM > > To: bjorn.andersson@linaro.org; catalin.marinas@arm.com; > > devicetree@vger.kernel.org; dinguyen@kernel.org; > > enric.balletbo@collabora.com; festevam@gmail.com; > > horms+renesas@verge.net.au; jagan@amarulasolutions.com; > > kernel@pengutronix.de; l.stach@pengutronix.de; linux-arm- > > kernel@lists.infradead.org; linux-clk@vger.kernel.org; linux- > > kernel@vger.kernel.org; mark.rutland@arm.com; > > maxime.ripard@bootlin.com; mturquette@baylibre.com; olof@lixom.net; > > robh+dt@kernel.org; s.hauer@pengutronix .de ; > > shawnguo@kernel.org; will.deacon@arm.com; Abel Vesa > > ; Aisheng Dong ; Anson > > Huang ; Jacky Bai ; Leonard > > Crestez > > Cc: dl-linux-imx > > Subject: RE: [PATCH V3 3/4] clk: imx: Add support for i.MX8MN clock dri= ver > >=20 > > Quoting Anson Huang (2019-06-06 17:50:28) > > > > > > I will use devm_platform_ioremap_resource() instead of ioremap(), and > > > can you be more specific about devmified clk registration? > > > > >=20 > > I mean using things like devm_clk_hw_register(). >=20 > Sorry, I am still a little confused, all the clock register(clk_register(= )) are via each different > clock types like imx_clk_gate4/imx_clk_pll14xx, if using clk_hw_register,= means we need > to re-write the clock driver using different clk register method, that wi= ll make the driver > completely different from i.mx8mq/i.mx8mm, they are actually same series = of SoC as i.mx8mn, > it will introduce many confusion, is my understanding correct? And is it = OK to just keep what > it is and make them all aligned? >=20 Ok, the problem I'm trying to point out is that clk registrations need to be undone, i.e. clk_unregister() needs to be called, when the driver fails to probe. devm_*() is one way to do this, but if you have other ways of removing all the registered clks then that works too. Makes sense?