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[209.132.180.67]) by mx.google.com with ESMTP id n14si9816666pgv.81.2019.06.11.01.54.42; Tue, 11 Jun 2019 01:54:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@infradead.org header.s=merlin.20170209 header.b=1ZHDBT3E; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404547AbfFKIyQ (ORCPT + 99 others); Tue, 11 Jun 2019 04:54:16 -0400 Received: from merlin.infradead.org ([205.233.59.134]:52066 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2403836AbfFKIyQ (ORCPT ); Tue, 11 Jun 2019 04:54:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=oNB+aTQSj5QdbOozDSyWkKd5mSFxqvoD2yse7nwmXTk=; b=1ZHDBT3EwTqLCtJnbAlSiRnaw aY1nMfeNngnGJr8MIYfdrNKwmhCTEuGazCz24yab/C9xWAMTjPNiwF8i4R8o+opB/46lizNkvBH6s yITAHyaJC3UZkI+J9iWDZD/2MkneVnLwK8hbkfW64+pDlosgcKGstJUxRkT++U8M2gKkCRgpHMnmC hUL2L6SLcMAOPVeVCxuLGjD8w+o7PPmyBW0ZI/GpH1/R/KIk546JcVSnIC0f5drLPgCy3iZnhTzP+ rGK0Yz7y7sYdoBRhts/VvlxbPxbF8uMP/rTebW06xjBb3FAjvWpR9gvtxOZUrQTs4VDzPW0CqZZQv /WXHozdaA==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by merlin.infradead.org with esmtpsa (Exim 4.92 #3 (Red Hat Linux)) id 1hacXj-0003Zp-Sp; Tue, 11 Jun 2019 08:54:12 +0000 Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id A0108202173E3; Tue, 11 Jun 2019 10:54:10 +0200 (CEST) Date: Tue, 11 Jun 2019 10:54:10 +0200 From: Peter Zijlstra To: Fenghua Yu Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , H Peter Anvin , Andy Lutomirski , Ashok Raj , Tony Luck , Ravi V Shankar , linux-kernel , x86 Subject: Re: [PATCH v4 3/5] x86/umwait: Add sysfs interface to control umwait C0.2 state Message-ID: <20190611085410.GT3436@hirez.programming.kicks-ass.net> References: <1559944837-149589-1-git-send-email-fenghua.yu@intel.com> <1559944837-149589-4-git-send-email-fenghua.yu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1559944837-149589-4-git-send-email-fenghua.yu@intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 07, 2019 at 03:00:35PM -0700, Fenghua Yu wrote: > C0.2 state in umwait and tpause instructions can be enabled or disabled > on a processor through IA32_UMWAIT_CONTROL MSR register. > > By default, C0.2 is enabled and the user wait instructions result in > lower power consumption with slower wakeup time. > > But in real time systems which require faster wakeup time although power > savings could be smaller, the administrator needs to disable C0.2 and all > C0.2 requests from user applications revert to C0.1. > > A sysfs interface "/sys/devices/system/cpu/umwait_control/enable_c02" is > created to allow the administrator to control C0.2 state during run time. We already have an interface for applications to convey their latency requirements (pm-qos). We do not need another magic sys variable.