Received: by 2002:a25:ab43:0:0:0:0:0 with SMTP id u61csp5460341ybi;
        Wed, 12 Jun 2019 02:55:32 -0700 (PDT)
X-Google-Smtp-Source: APXvYqzCW6Kv9038tguyAKDMVXtYNWldqO68yph35fnMO7zbthYhnEE+GkSJzKiUPmKFntiRYRGp
X-Received: by 2002:a63:ed06:: with SMTP id d6mr22045972pgi.267.1560333332200;
        Wed, 12 Jun 2019 02:55:32 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1560333332; cv=none;
        d=google.com; s=arc-20160816;
        b=CePMBuZWiCh/l64ZmrBvtppikiHmvN6vMOFmJsg6TtHzTC+j0EL7+vAWgoPSaoxIpy
         He9sPi6PaRKnBKZOUy2eC1MN5g6Q3zafdcC1saG89AOkRKoHG6tkUwkC2nGGffS2vQ6x
         R6I/KnW5iXUooyF7PlRH2UYIpMc7y1uRYkGiowkU9wBTZORbKlsqojeU07fzV8W8sXNy
         3kzrChCmBjsJjFhSdhRHW2YvLGy3r+px8dTOLBXzNpFw3SjQQxxBn87VSwTCUZZzVFBo
         yvczySKpbWoS8cT7nsi+PK3/6PPGLVuww8l1sVQtrcY6uAq+bYtdo8izikqKkBx5ww4A
         nvWA==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:dkim-signature:mime-version:references
         :in-reply-to:message-id:date:subject:cc:to:from;
        bh=x+UNhvug6m95q2R8x1epP6wN68CTmBZhQxZ1ahpXw54=;
        b=ZyjSECyZaZOjH0mfN9bk2TJcQAiofCN8xnPVgbIra7KxNljiaEn6FykmInyJ8mKwDV
         V6rJI2CQPaE5ZvP0JHaSISyLWQkSl0IIjX1OxVewYus4nkp6UCSdDltctFICenIPQqe2
         MaknJkebU2dWqQMxfpzlCDUWGBO6ltZGCvoECIWGK8wy1cPTCrJneeeIXAYatayp2y4F
         bef60cALob2rD4q4hcVkI0Ed+H3ebPfH9r7tkRGboWMO94OfoaGukBPuo5b6k4R5sNx2
         9kUusxCIDMjUeXv0CkZJznxspesImScY0RahRykGhtkGE4N7JO5Nj4AE5dQNURlcHqm7
         kLJw==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=ObWaD0Ym;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id m143si10085392pfd.224.2019.06.12.02.55.17;
        Wed, 12 Jun 2019 02:55:32 -0700 (PDT)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=ObWaD0Ym;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S2437853AbfFLJyv (ORCPT <rfc822;fezhang.suse@gmail.com>
        + 99 others); Wed, 12 Jun 2019 05:54:51 -0400
Received: from hqemgate15.nvidia.com ([216.228.121.64]:17642 "EHLO
        hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S2437696AbfFLJyv (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Wed, 12 Jun 2019 05:54:51 -0400
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)
        id <B5d00cbe70000>; Wed, 12 Jun 2019 02:54:47 -0700
Received: from hqmail.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Wed, 12 Jun 2019 02:54:50 -0700
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Wed, 12 Jun 2019 02:54:50 -0700
Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL108.nvidia.com
 (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 12 Jun
 2019 09:54:49 +0000
Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL102.nvidia.com
 (172.18.146.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 12 Jun
 2019 09:54:49 +0000
Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL103.nvidia.com
 (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend
 Transport; Wed, 12 Jun 2019 09:54:49 +0000
Received: from vidyas-desktop.nvidia.com (Not Verified[10.24.37.38]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5d00cbe40002>; Wed, 12 Jun 2019 02:54:49 -0700
From:   Vidya Sagar <vidyas@nvidia.com>
To:     <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
        <robh+dt@kernel.org>, <mark.rutland@arm.com>,
        <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
        <kishon@ti.com>, <catalin.marinas@arm.com>, <will.deacon@arm.com>,
        <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>
CC:     <digetx@gmail.com>, <mperttunen@nvidia.com>,
        <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
        <mmaddireddy@nvidia.com>, <vidyas@nvidia.com>, <sagar.tv@gmail.com>
Subject: [PATCH V10 06/15] dt-bindings: PCI: designware: Add binding for CDM register check
Date:   Wed, 12 Jun 2019 15:23:30 +0530
Message-ID: <20190612095339.20118-7-vidyas@nvidia.com>
X-Mailer: git-send-email 2.17.1
In-Reply-To: <20190612095339.20118-1-vidyas@nvidia.com>
References: <20190612095339.20118-1-vidyas@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1560333287; bh=x+UNhvug6m95q2R8x1epP6wN68CTmBZhQxZ1ahpXw54=;
        h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer:
         In-Reply-To:References:X-NVConfidentiality:MIME-Version:
         Content-Type;
        b=ObWaD0YmNNGjPqgHB4jSB6F19gwkFUKfrj0pLM7oaYT0vaU7VBu3xKqKHHWW8rnYq
         m+nSSHdr4TyIX7tO7XkF2cWQ8wLRGrLgqltfWg1/dI+ebPeeRWBzcMDp09avYxJ3Nj
         lAFxjgB1X9a2JThe7ES3dGb4zoj7cgaHvP4TNNCb+eRPBg5QmPU7yLjdUACuqgM84v
         GcLb7xjber2OzUq0mP/UVbOzC/0m+Bmb6+Q9kswephjqvQXZEMcK1jvjdgbSIzIDoc
         +dOiUKpqr4Pqc3+BLhqSLxEnRVKOTO3bi76BIkDoA6ywjLvs0Qq389iTZej24oNAgK
         WKexqGsyT0ZKw==
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Add support to enable CDM (Configuration Dependent Module) registers check
for any data corruption. CDM registers include standard PCIe configuration
space registers, Port Logic registers and iATU and DMA registers.
Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook
Version 4.90a

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes since [v9]:
* None

Changes since [v8]:
* None

Changes since [v7]:
* None

Changes since [v6]:
* Changed "enable-cdm-check" to "snps,enable-cdm-check"

Changes since [v5]:
* None

Changes since [v4]:
* None

Changes since [v3]:
* None

Changes since [v2]:
* Changed flag name from 'cdm-check' to 'enable-cdm-check'
* Added info about Port Logic and DMA registers being part of CDM

Changes since [v1]:
* This is a new patch in v2 series

 Documentation/devicetree/bindings/pci/designware-pcie.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 5561a1c060d0..3fba04da6a59 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -34,6 +34,11 @@ Optional properties:
 - clock-names: Must include the following entries:
 	- "pcie"
 	- "pcie_bus"
+- snps,enable-cdm-check: This is a boolean property and if present enables
+   automatic checking of CDM (Configuration Dependent Module) registers
+   for data corruption. CDM registers include standard PCIe configuration
+   space registers, Port Logic registers, DMA and iATU (internal Address
+   Translation Unit) registers.
 RC mode:
 - num-viewport: number of view ports configured in hardware. If a platform
   does not specify it, the driver assumes 2.
-- 
2.17.1