Received: by 2002:a25:ab43:0:0:0:0:0 with SMTP id u61csp7054645ybi;
        Thu, 13 Jun 2019 08:48:53 -0700 (PDT)
X-Google-Smtp-Source: APXvYqyvnaRxRFaw/ytI7Kxf7CkgAMjIWjfbsyrj7I95fAe0nGiSxHILUnysttVgi9GptFI4ahme
X-Received: by 2002:a63:5d61:: with SMTP id o33mr1828677pgm.114.1560440932768;
        Thu, 13 Jun 2019 08:48:52 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1560440932; cv=none;
        d=google.com; s=arc-20160816;
        b=UC0JnAtk8VPkSX8mvBT1PqvGOrqA3E0w+OQJczLNZj+ine9sCcKqvQc38N6FtMe1w6
         7CrB41ayFWozgMnYJUtWy5SE3iUFuRUsLeL5Ad0eXNaOgda6qjn9EhHc39wxfJtV6KPf
         g8YLVmnYClbiEGwapLT11eLnRS9BPqp5RtcPCKkb35SOpPhy+FhWFE/tZq6eoZNlJI7/
         PooTt/Lj/e3ZYIABfh1IKkfjDuHcEHS34czap/bjl4KmkpS6ApSlpUkDaEoob5V2sGeY
         2yQGlW0wZKifiPlEwK3XZxA1SIaVcuh3WUdh10maRV8DrRamZ/l5UFLIwosUe5Vqxwkp
         S6AQ==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:dkim-signature:content-transfer-encoding
         :content-language:in-reply-to:mime-version:user-agent:date
         :message-id:from:references:cc:to:subject;
        bh=NXHlTe3GaS+Cy5onlPwUV0gn1UM6F+0x2c5imipRZvo=;
        b=ypKmPQwhjiT6RXfp8JyOfU1w+/zxmQFjPwx8L+pp0cgk+a/aSSKSZeHvHIvjEczP9O
         eoBlciJf2F33mFSiReU8NzPqUNRuk2lhreSKafRJS7jC2LUCS4flROVazc6khzQs5uTa
         i3I+Kx4pfZ8LDtWLpx/0MFfg5/wDnXGofG8nlVEtVN+KaR+D7om75mnq/CGkFOUVDqsa
         K3iS8h3i8+A9hrGE7BFTeoMFZn1Ixj0B/gprYxhUAuC0Rw3g75eN6SNBfr7XxMIX+R3G
         xF4mQwjHg+A7gRouyKBgHK290hY1K0zQOqaKNj7N2o6ePdMGydXv3ao16qqEZ3ViQcnR
         q16g==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b="L/Zq2yHg";
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id 11si86465pgk.422.2019.06.13.08.48.37;
        Thu, 13 Jun 2019 08:48:52 -0700 (PDT)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b="L/Zq2yHg";
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1732444AbfFMPq1 (ORCPT <rfc822;mailist1go@gmail.com>
        + 99 others); Thu, 13 Jun 2019 11:46:27 -0400
Received: from hqemgate16.nvidia.com ([216.228.121.65]:17146 "EHLO
        hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1731789AbfFMJm5 (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Thu, 13 Jun 2019 05:42:57 -0400
Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)
        id <B5d021a9f0000>; Thu, 13 Jun 2019 02:42:55 -0700
Received: from hqmail.nvidia.com ([172.20.161.6])
  by hqpgpgate102.nvidia.com (PGP Universal service);
  Thu, 13 Jun 2019 02:42:55 -0700
X-PGP-Universal: processed;
        by hqpgpgate102.nvidia.com on Thu, 13 Jun 2019 02:42:55 -0700
Received: from [10.21.132.148] (10.124.1.5) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 13 Jun
 2019 09:42:53 +0000
Subject: Re: [PATCH v3 1/2] arm64: tegra: add ACONNECT, ADMA and AGIC nodes
To:     Sameer Pujar <spujar@nvidia.com>, <thierry.reding@gmail.com>,
        <robh+dt@kernel.org>, <mark.rutland@arm.com>
CC:     <mkumard@nvidia.com>, <devicetree@vger.kernel.org>,
        <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>
References: <1560417053-2966-1-git-send-email-spujar@nvidia.com>
From:   Jon Hunter <jonathanh@nvidia.com>
Message-ID: <8a71e670-7943-6bce-ba61-3f020fd9450d@nvidia.com>
Date:   Thu, 13 Jun 2019 10:42:50 +0100
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101
 Thunderbird/60.7.0
MIME-Version: 1.0
In-Reply-To: <1560417053-2966-1-git-send-email-spujar@nvidia.com>
X-Originating-IP: [10.124.1.5]
X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To
 HQMAIL107.nvidia.com (172.20.187.13)
Content-Type: text/plain; charset="utf-8"
Content-Language: en-US
Content-Transfer-Encoding: 7bit
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1560418975; bh=NXHlTe3GaS+Cy5onlPwUV0gn1UM6F+0x2c5imipRZvo=;
        h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date:
         User-Agent:MIME-Version:In-Reply-To:X-Originating-IP:
         X-ClientProxiedBy:Content-Type:Content-Language:
         Content-Transfer-Encoding;
        b=L/Zq2yHgLKt0kM4/qRYcmL28PCijfoXShKeeU7UnR9fh0fOf3V1rH9Ye1R7oL3zmI
         Xbbkp+BFBb4UfWqQ8kr5l1RgcPAmLMFW0bqafXnf2IgmwyJqvEJZEfKFguZVW7rrG0
         +Bhg4AANFJPH+eX4x32pkt9EJcokxjB+7VHChVbAOKIRknk49SfyflTKWX6B3LffCS
         ibib2hNQWASNeiuOwbCBwUjAH+lJbcgpNEki6qCtWL1m83ww3/dXDhVdpUG7EVVprq
         IEzdI9/J884aAP2jw8apMeTCUyhHzUnm3x5RS84CiumO6ZRyYoliVmkdBT11sMmBSo
         OMbBF4k2sO44Q==
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org


On 13/06/2019 10:10, Sameer Pujar wrote:
> Add DT nodes for following devices on Tegra186 and Tegra194
>  * ACONNECT
>  * ADMA
>  * AGIC
> 
> Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> ---
>  changes in current revision
>   * use single address range for all APE modules
>   * fix address range for agic
> 
>  arch/arm64/boot/dts/nvidia/tegra186.dtsi | 67 ++++++++++++++++++++++++++++++++
>  arch/arm64/boot/dts/nvidia/tegra194.dtsi | 67 ++++++++++++++++++++++++++++++++
>  2 files changed, 134 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> index 426ac0b..b4d735e 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> @@ -1295,4 +1295,71 @@
>  				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>  		interrupt-parent = <&gic>;
>  	};
> +
> +	aconnect@2a41000 {

This address does not look correct. This appears to be the address of
the AGIC. I think it should be 2900000, however, I also wonder if we
should even bother with an address for the aconnect as this is just a
bus and we don't specific a 'reg' property.

> +		compatible = "nvidia,tegra210-aconnect";
> +		clocks = <&bpmp TEGRA186_CLK_APE>,
> +			 <&bpmp TEGRA186_CLK_APB2APE>;
> +		clock-names = "ape", "apb2ape";
> +		power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0x02900000 0x0 0x02900000 0x1FFFFF>;

This should be 0x1fffff.

> +		status = "disabled";
> +
> +		dma-controller@2930000 {
> +			compatible = "nvidia,tegra186-adma";
> +			reg = <0x02930000 0x50000>;
> +			interrupt-parent = <&agic>;
> +			interrupts =  <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
> +				      <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> +			#dma-cells = <1>;
> +			clocks = <&bpmp TEGRA186_CLK_AHUB>;
> +			clock-names = "d_audio";
> +			status = "disabled";
> +		};
> +
> +		agic: agic@2a41000 {

I think that this should also be "agic: interrupt-controller@xxxx" to
conform with standard names. Sorry the Tegra210 version is not the best
reference!

Cheers
Jon

-- 
nvpublic