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[209.132.180.67]) by mx.google.com with ESMTP id t4si3156061plq.93.2019.06.14.12.49.18; Fri, 14 Jun 2019 12:49:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=VoQICBqU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726201AbfFNTtG (ORCPT + 99 others); Fri, 14 Jun 2019 15:49:06 -0400 Received: from mail-io1-f67.google.com ([209.85.166.67]:39085 "EHLO mail-io1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725802AbfFNTtE (ORCPT ); Fri, 14 Jun 2019 15:49:04 -0400 Received: by mail-io1-f67.google.com with SMTP id r185so2385473iod.6 for ; Fri, 14 Jun 2019 12:49:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MaIZMt5yxWM5sQE6WNzCNSiNAgVByKuy80p0JaL7TBk=; b=VoQICBqULb/R5HagGxuWPrQC1hUG3UiOK8UKV0Jlr3tiUzgxAIznwLvOId7GA3qwby UCTnpOQw7XWiVERAigg+64axRRNSBzwxsPpYDPdkS8cGXoGW8tbu1CzN349fJBJguVsn vZNhTDXABOdNXz0VqMXJ7i+Rze9RdKa/EXCnc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MaIZMt5yxWM5sQE6WNzCNSiNAgVByKuy80p0JaL7TBk=; b=nbOXWEaDxdjOWAe74tp5/YgX8hmqsipWsHa05jgeoG8KH8VzaIfrd4IX7qy+rDMKWJ HfTF2cznzl8x6pa2Ptcv82mKaalXcGkZGJemx5aIuG5gkCEOE8MO+/tB9IPMvgxd7584 1aGslYP+wOGnF8yJyS9M+PfC9EhMD9fS3MoFkN+FZH6Q9x0zjxu0c/1gY4JP/OQpuPNb NSnXUph/Lk0mtlmnR00EcHdseW8DdYbc1YXEgNCDw6UQDSEGftubDr5mJLShqMEpkLER c92BsUB7l+zZ2nwhVcRv4jJMVGG+59kIGbUTQvv03sVRlWyk1QH/TPTBauF5o8rlOdx2 Vi1A== X-Gm-Message-State: APjAAAXGS5DiLi477KQr5m5aNrsG9/QBvq1R3x6nwXHt6GrW6QOjGIE3 SBci9ThXxS3qEf1i3evNr4rt+qpsc05YKw== X-Received: by 2002:a5d:8506:: with SMTP id q6mr1977682ion.41.1560541743081; Fri, 14 Jun 2019 12:49:03 -0700 (PDT) Received: from localhost ([2620:15c:183:200:33ce:f5cf:f863:d3a6]) by smtp.gmail.com with ESMTPSA id t133sm5976689iof.21.2019.06.14.12.49.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Jun 2019 12:49:02 -0700 (PDT) From: Fletcher Woodruff To: linux-kernel@vger.kernel.org Cc: Fletcher Woodruff , Jaroslav Kysela , Liam Girdwood , Mark Brown , Oder Chiou , Takashi Iwai , Curtis Malainey , Ross Zwisler , alsa-devel@alsa-project.org, Ben Zhang Subject: [PATCH v7 2/4] ASoC: rt5677: move jack-detect init to i2c probe Date: Fri, 14 Jun 2019 13:48:52 -0600 Message-Id: <20190614194854.208436-3-fletcherw@chromium.org> X-Mailer: git-send-email 2.22.0.410.gd8fdbe21b5-goog In-Reply-To: <20190614194854.208436-1-fletcherw@chromium.org> References: <20190614194854.208436-1-fletcherw@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch moves the code to select the gpios for jack detection from rt5677_probe to rt5677_init_irq (called from rt5677_i2c_probe). It also sets some registers to fix bugs related to jack detection, and adds some constants and comments to make it easier to understand what certain register settings are controlling. Signed-off-by: Ben Zhang Signed-off-by: Fletcher Woodruff --- sound/soc/codecs/rt5677.c | 60 ++++++++++++++++++++++----------------- sound/soc/codecs/rt5677.h | 6 ++++ 2 files changed, 40 insertions(+), 26 deletions(-) diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index fe000f30b9ad5f..87a92ba0d040b7 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -4716,37 +4716,13 @@ static int rt5677_probe(struct snd_soc_component *component) snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF); - regmap_write(rt5677->regmap, RT5677_DIG_MISC, 0x0020); + regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, + ~RT5677_IRQ_DEBOUNCE_SEL_MASK, 0x0020); regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x0c00); for (i = 0; i < RT5677_GPIO_NUM; i++) rt5677_gpio_config(rt5677, i, rt5677->pdata.gpio_config[i]); - if (rt5677->irq_data) { - regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1, 0x8000, - 0x8000); - regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x0018, - 0x0008); - - if (rt5677->pdata.jd1_gpio) - regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, - RT5677_SEL_GPIO_JD1_MASK, - rt5677->pdata.jd1_gpio << - RT5677_SEL_GPIO_JD1_SFT); - - if (rt5677->pdata.jd2_gpio) - regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, - RT5677_SEL_GPIO_JD2_MASK, - rt5677->pdata.jd2_gpio << - RT5677_SEL_GPIO_JD2_SFT); - - if (rt5677->pdata.jd3_gpio) - regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, - RT5677_SEL_GPIO_JD3_MASK, - rt5677->pdata.jd3_gpio << - RT5677_SEL_GPIO_JD3_SFT); - } - mutex_init(&rt5677->dsp_cmd_lock); mutex_init(&rt5677->dsp_pri_lock); @@ -5096,6 +5072,7 @@ static int rt5677_init_irq(struct i2c_client *i2c) { int ret; struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c); + unsigned int jd_mask = 0, jd_val = 0; if (!rt5677->pdata.jd1_gpio && !rt5677->pdata.jd2_gpio && @@ -5107,6 +5084,37 @@ static int rt5677_init_irq(struct i2c_client *i2c) return -EINVAL; } + /* + * Select RC as the debounce clock so that GPIO works even when + * MCLK is gated which happens when there is no audio stream + * (SND_SOC_BIAS_OFF). + */ + regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, + RT5677_IRQ_DEBOUNCE_SEL_MASK, + RT5677_IRQ_DEBOUNCE_SEL_RC); + + /* Enable auto power on RC when GPIO states are changed */ + regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL1, 0xff, 0xff); + + /* Select and enable jack detection sources per platform data */ + if (rt5677->pdata.jd1_gpio) { + jd_mask |= RT5677_SEL_GPIO_JD1_MASK; + jd_val |= rt5677->pdata.jd1_gpio << RT5677_SEL_GPIO_JD1_SFT; + } + if (rt5677->pdata.jd2_gpio) { + jd_mask |= RT5677_SEL_GPIO_JD2_MASK; + jd_val |= rt5677->pdata.jd2_gpio << RT5677_SEL_GPIO_JD2_SFT; + } + if (rt5677->pdata.jd3_gpio) { + jd_mask |= RT5677_SEL_GPIO_JD3_MASK; + jd_val |= rt5677->pdata.jd3_gpio << RT5677_SEL_GPIO_JD3_SFT; + } + regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, jd_mask, jd_val); + + /* Set GPIO1 pin to be IRQ output */ + regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1, + RT5677_GPIO1_PIN_MASK, RT5677_GPIO1_PIN_IRQ); + ret = regmap_add_irq_chip(rt5677->regmap, i2c->irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0, &rt5677_irq_chip, &rt5677->irq_data); diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h index 076e5161d8da30..c26edd387e340b 100644 --- a/sound/soc/codecs/rt5677.h +++ b/sound/soc/codecs/rt5677.h @@ -1664,6 +1664,12 @@ #define RT5677_GPIO6_P_NOR (0x0 << 0) #define RT5677_GPIO6_P_INV (0x1 << 0) +/* General Control (0xfa) */ +#define RT5677_IRQ_DEBOUNCE_SEL_MASK (0x3 << 3) +#define RT5677_IRQ_DEBOUNCE_SEL_MCLK (0x0 << 3) +#define RT5677_IRQ_DEBOUNCE_SEL_RC (0x1 << 3) +#define RT5677_IRQ_DEBOUNCE_SEL_SLIM (0x2 << 3) + /* Virtual DSP Mixer Control (0xf7 0xf8 0xf9) */ #define RT5677_DSP_IB_01_H (0x1 << 15) #define RT5677_DSP_IB_01_H_SFT 15 -- 2.22.0.410.gd8fdbe21b5-goog