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Subject: [PATCH 4/6] net: macb: add support for c45 PHY
Date:   Sun, 16 Jun 2019 08:05:12 +0100
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This patch modify MDIO read/write functions to support
communication with C45 PHY.

Signed-off-by: Parshuram Thombare <pthombar@cadence.com>
---
 drivers/net/ethernet/cadence/macb.h      | 15 ++++--
 drivers/net/ethernet/cadence/macb_main.c | 61 +++++++++++++++++++-----
 drivers/net/ethernet/cadence/macb_pci.c  | 60 +++++++++++------------
 3 files changed, 91 insertions(+), 45 deletions(-)

diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 85c7e4cb1057..75f093bc52fe 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -667,10 +667,17 @@
 #define GEM_CLK_DIV96				5
 
 /* Constants for MAN register */
-#define MACB_MAN_SOF				1
-#define MACB_MAN_WRITE				1
-#define MACB_MAN_READ				2
-#define MACB_MAN_CODE				2
+#define MACB_MAN_C22_SOF                        1
+#define MACB_MAN_C22_WRITE                      1
+#define MACB_MAN_C22_READ                       2
+#define MACB_MAN_C22_CODE                       2
+
+#define MACB_MAN_C45_SOF                        0
+#define MACB_MAN_C45_ADDR                       0
+#define MACB_MAN_C45_WRITE                      1
+#define MACB_MAN_C45_POST_READ_INCR             2
+#define MACB_MAN_C45_READ                       3
+#define MACB_MAN_C45_CODE                       2
 
 /* Capability mask bits */
 #define MACB_CAPS_ISR_CLEAR_ON_WRITE		BIT(0)
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 5b3e7d9f4384..57ffc4e9d2b9 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -334,11 +334,30 @@ static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 	if (status < 0)
 		goto mdio_read_exit;
 
-	macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
-			      | MACB_BF(RW, MACB_MAN_READ)
-			      | MACB_BF(PHYA, mii_id)
-			      | MACB_BF(REGA, regnum)
-			      | MACB_BF(CODE, MACB_MAN_CODE)));
+	if (regnum & MII_ADDR_C45) {
+		macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C45_SOF)
+			    | MACB_BF(RW, MACB_MAN_C45_ADDR)
+			    | MACB_BF(PHYA, mii_id)
+			    | MACB_BF(REGA, (regnum >> 16) & 0x1F)
+			    | MACB_BF(DATA, regnum & 0xFFFF)
+			    | MACB_BF(CODE, MACB_MAN_C45_CODE)));
+
+		status = macb_mdio_wait_for_idle(bp);
+		if (status < 0)
+			goto mdio_read_exit;
+
+		macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C45_SOF)
+			    | MACB_BF(RW, MACB_MAN_C45_READ)
+			    | MACB_BF(PHYA, mii_id)
+			    | MACB_BF(REGA, (regnum >> 16) & 0x1F)
+			    | MACB_BF(CODE, MACB_MAN_C45_CODE)));
+	} else {
+		macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C22_SOF)
+				| MACB_BF(RW, MACB_MAN_C22_READ)
+				| MACB_BF(PHYA, mii_id)
+				| MACB_BF(REGA, regnum)
+				| MACB_BF(CODE, MACB_MAN_C22_CODE)));
+	}
 
 	status = macb_mdio_wait_for_idle(bp);
 	if (status < 0)
@@ -367,12 +386,32 @@ static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
 	if (status < 0)
 		goto mdio_write_exit;
 
-	macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
-			      | MACB_BF(RW, MACB_MAN_WRITE)
-			      | MACB_BF(PHYA, mii_id)
-			      | MACB_BF(REGA, regnum)
-			      | MACB_BF(CODE, MACB_MAN_CODE)
-			      | MACB_BF(DATA, value)));
+	if (regnum & MII_ADDR_C45) {
+		macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C45_SOF)
+			    | MACB_BF(RW, MACB_MAN_C45_ADDR)
+			    | MACB_BF(PHYA, mii_id)
+			    | MACB_BF(REGA, (regnum >> 16) & 0x1F)
+			    | MACB_BF(DATA, regnum & 0xFFFF)
+			    | MACB_BF(CODE, MACB_MAN_C45_CODE)));
+
+		status = macb_mdio_wait_for_idle(bp);
+		if (status < 0)
+			goto mdio_write_exit;
+
+		macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C45_SOF)
+			    | MACB_BF(RW, MACB_MAN_C45_WRITE)
+			    | MACB_BF(PHYA, mii_id)
+			    | MACB_BF(REGA, (regnum >> 16) & 0x1F)
+			    | MACB_BF(CODE, MACB_MAN_C45_CODE)
+			    | MACB_BF(DATA, value)));
+	} else {
+		macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C22_SOF)
+				| MACB_BF(RW, MACB_MAN_C22_WRITE)
+				| MACB_BF(PHYA, mii_id)
+				| MACB_BF(REGA, regnum)
+				| MACB_BF(CODE, MACB_MAN_C22_CODE)
+				| MACB_BF(DATA, value)));
+	}
 
 	status = macb_mdio_wait_for_idle(bp);
 	if (status < 0)
diff --git a/drivers/net/ethernet/cadence/macb_pci.c b/drivers/net/ethernet/cadence/macb_pci.c
index 1001e03191a1..23ca4557f45c 100644
--- a/drivers/net/ethernet/cadence/macb_pci.c
+++ b/drivers/net/ethernet/cadence/macb_pci.c
@@ -69,11 +69,11 @@ static int macb_mdiobus_read(void __iomem *macb_base_addr,
 	int status;
 
 	if (regnum < 32) {
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_READ) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_READ) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, regnum) |
-			MACB_BF(CODE, MACB_MAN_CODE);
+			MACB_BF(CODE, MACB_MAN_C22_CODE);
 
 		writel(i, macb_base_addr + MACB_MAN);
 		status = macb_mdio_wait_for_idle(macb_base_addr);
@@ -84,22 +84,22 @@ static int macb_mdiobus_read(void __iomem *macb_base_addr,
 
 		reg = MACB_BF(REGCR_OP, MACB_REGCR_OP_ADDR) |
 				MACB_BF(REGCR_DEVADDR, TI_PHY_DEVADDR);
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_WRITE) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_WRITE) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, PHY_REGCR) |
-			MACB_BF(CODE, MACB_MAN_CODE) |
+			MACB_BF(CODE, MACB_MAN_C22_CODE) |
 			MACB_BF(DATA, reg);
 		writel(i, macb_base_addr + MACB_MAN);
 		status = macb_mdio_wait_for_idle(macb_base_addr);
 		if (status < 0)
 			return status;
 
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_WRITE) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_WRITE) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, PHY_ADDAR) |
-			MACB_BF(CODE, MACB_MAN_CODE) |
+			MACB_BF(CODE, MACB_MAN_C22_CODE) |
 			MACB_BF(DATA, regnum);
 		writel(i, macb_base_addr + MACB_MAN);
 		status = macb_mdio_wait_for_idle(macb_base_addr);
@@ -108,22 +108,22 @@ static int macb_mdiobus_read(void __iomem *macb_base_addr,
 
 		reg = MACB_BF(REGCR_OP, MACB_REGCR_OP_DATA) |
 				MACB_BF(REGCR_DEVADDR, TI_PHY_DEVADDR);
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_WRITE) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_WRITE) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, PHY_REGCR) |
-			MACB_BF(CODE, MACB_MAN_CODE) |
+			MACB_BF(CODE, MACB_MAN_C22_CODE) |
 			MACB_BF(DATA, reg);
 		writel(i, macb_base_addr + MACB_MAN);
 		status = macb_mdio_wait_for_idle(macb_base_addr);
 		if (status < 0)
 			return status;
 
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_READ) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_READ) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, PHY_ADDAR) |
-			MACB_BF(CODE, MACB_MAN_CODE);
+			MACB_BF(CODE, MACB_MAN_C22_CODE);
 
 		writel(i, macb_base_addr + MACB_MAN);
 		status = macb_mdio_wait_for_idle(macb_base_addr);
@@ -141,11 +141,11 @@ static int macb_mdiobus_write(void __iomem *macb_base_addr, u32 phy_id,
 	int status;
 
 	if (regnum < 32) {
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_WRITE) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_WRITE) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, regnum) |
-			MACB_BF(CODE, MACB_MAN_CODE) |
+			MACB_BF(CODE, MACB_MAN_C22_CODE) |
 			MACB_BF(DATA, value);
 
 		writel(i, macb_base_addr + MACB_MAN);
@@ -157,22 +157,22 @@ static int macb_mdiobus_write(void __iomem *macb_base_addr, u32 phy_id,
 
 		reg = MACB_BF(REGCR_OP, MACB_REGCR_OP_ADDR) |
 				MACB_BF(REGCR_DEVADDR, TI_PHY_DEVADDR);
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_WRITE) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_WRITE) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, PHY_REGCR) |
-			MACB_BF(CODE, MACB_MAN_CODE) |
+			MACB_BF(CODE, MACB_MAN_C22_CODE) |
 			MACB_BF(DATA, reg);
 		writel(i, macb_base_addr + MACB_MAN);
 		status = macb_mdio_wait_for_idle(macb_base_addr);
 		if (status < 0)
 			return status;
 
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_WRITE) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_WRITE) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, PHY_ADDAR) |
-			MACB_BF(CODE, MACB_MAN_CODE) |
+			MACB_BF(CODE, MACB_MAN_C22_CODE) |
 			MACB_BF(DATA, regnum);
 		writel(i, macb_base_addr + MACB_MAN);
 		status = macb_mdio_wait_for_idle(macb_base_addr);
@@ -181,22 +181,22 @@ static int macb_mdiobus_write(void __iomem *macb_base_addr, u32 phy_id,
 
 		reg = MACB_BF(REGCR_OP, MACB_REGCR_OP_DATA) |
 				MACB_BF(REGCR_DEVADDR, TI_PHY_DEVADDR);
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_WRITE) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_WRITE) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, PHY_REGCR) |
-			MACB_BF(CODE, MACB_MAN_CODE) |
+			MACB_BF(CODE, MACB_MAN_C22_CODE) |
 			MACB_BF(DATA, reg);
 		writel(i, macb_base_addr + MACB_MAN);
 		status = macb_mdio_wait_for_idle(macb_base_addr);
 		if (status < 0)
 			return status;
 
-		i = MACB_BF(SOF, MACB_MAN_SOF) |
-			MACB_BF(RW, MACB_MAN_WRITE) |
+		i = MACB_BF(SOF, MACB_MAN_C22_SOF) |
+			MACB_BF(RW, MACB_MAN_C22_WRITE) |
 			MACB_BF(PHYA, phy_id) |
 			MACB_BF(REGA, PHY_ADDAR) |
-			MACB_BF(CODE, MACB_MAN_CODE) |
+			MACB_BF(CODE, MACB_MAN_C22_CODE) |
 			MACB_BF(DATA, value);
 
 		writel(i, macb_base_addr + MACB_MAN);
-- 
2.17.1