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Date:   Tue, 18 Jun 2019 13:41:49 +0200
From:   Thierry Reding <thierry.reding@gmail.com>
To:     Sowjanya Komatineni <skomatineni@nvidia.com>
Cc:     jonathanh@nvidia.com, tglx@linutronix.de, jason@lakedaemon.net,
        marc.zyngier@arm.com, linus.walleij@linaro.org, stefan@agner.ch,
        mark.rutland@arm.com, pdeschrijver@nvidia.com, pgaikwad@nvidia.com,
        sboyd@kernel.org, linux-clk@vger.kernel.org,
        linux-gpio@vger.kernel.org, jckuo@nvidia.com, josephl@nvidia.com,
        talho@nvidia.com, linux-tegra@vger.kernel.org,
        linux-kernel@vger.kernel.org, mperttunen@nvidia.com,
        spatra@nvidia.com, robh+dt@kernel.org, digetx@gmail.com,
        devicetree@vger.kernel.org
Subject: Re: [PATCH V3 05/17] clk: tegra: pllout: save and restore pllout
 context
Message-ID: <20190618114149.GH28892@ulmo>
References: <1560843991-24123-1-git-send-email-skomatineni@nvidia.com>
 <1560843991-24123-6-git-send-email-skomatineni@nvidia.com>
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On Tue, Jun 18, 2019 at 12:46:19AM -0700, Sowjanya Komatineni wrote:
> This patch implements save and restore of pllout context.
>=20
> During system suspend, core power goes off and looses the settings
> of the Tegra CAR controller registers.
>=20
> So during suspend entry the state of pllout is saved and on resume
> it is restored back to have pllout in same state as before suspend.
>=20
> pllout rate is saved and restore in clock divider so it will be at
> same rate as before suspend when pllout state is restored.
>=20
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
>  drivers/clk/tegra/clk-pll-out.c | 28 ++++++++++++++++++++++++++++
>  drivers/clk/tegra/clk.h         |  3 +++
>  2 files changed, 31 insertions(+)

Acked-by: Thierry Reding <treding@nvidia.com>

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