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[209.132.180.67]) by mx.google.com with ESMTP id j14si15351284pfi.276.2019.06.18.22.30.33; Tue, 18 Jun 2019 22:30:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@mobiveil.co.in header.s=google header.b="06W/Y3cS"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730785AbfFSF3E (ORCPT + 99 others); Wed, 19 Jun 2019 01:29:04 -0400 Received: from mail-lj1-f193.google.com ([209.85.208.193]:39101 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730337AbfFSF3E (ORCPT ); Wed, 19 Jun 2019 01:29:04 -0400 Received: by mail-lj1-f193.google.com with SMTP id v18so1924091ljh.6 for ; Tue, 18 Jun 2019 22:29:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mobiveil.co.in; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=uCUAPV+QexPTMtFpELNiq1RlIWLicRq4oH7TLWUppok=; b=06W/Y3cSZGK9qGdIkrRKae6GS83CtZgvcpLyiEYX/CH8oiz2QMNEnRHq9tkOe8Vhlv AaYmyZRoz+2JGbAkSTfAL+lYDZe+EKPXLD87Ug+rDiga9JVBb1lAfYm/OHzqIe7QQ4sg GNFRhx6EP/7BdHkzpUDQfWkORZMvcOicpDZ60= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=uCUAPV+QexPTMtFpELNiq1RlIWLicRq4oH7TLWUppok=; b=ZIJPSzORzqOgLant+3MaUs5zwrI8awgzo2cvxTzqTOaDsb9lMxQuiUbIdBTtQTA6ok rKstcolYw5wBZAe5e/wFnHdZMjm3idysOETswU1+m9OkkdzXtyqv00cJWKQ/oOJ6vi5c 3Mx83CHfaCdg+PKFOSlVbiEZcSjZvR8+cW/+ESmsoEMy9bdyVUH888Z7AxF8mUAj03un 5NgvcL6e5Uuubt7CMOyFb0BuITaMuMbD5vT33/ofzil604BlN6jp0ipVRoInSC2QVjEk 1SxlmBiD/PQ0e2KvdeQucC+vGGhSC7xck2Wowst3AubHSxgGy0I2M/jH9+mo71+85TIp 92VQ== X-Gm-Message-State: APjAAAUf6mHHSKEJAyttR/xbQanPVJegufB7cMqmQxhdC5gTNq61HLxj gvbzJvxJqdhyPlm7o3xlQqQrMWzUXtBBMaaZUGLJdE2N60de3KRbKA25e+PiAXJzqnQMzV+15t9 Ui8cw6nndx0p7z4PV0U7TyeEgXgKP3F0j6g== X-Received: by 2002:a2e:9bc6:: with SMTP id w6mr22630705ljj.156.1560922141583; Tue, 18 Jun 2019 22:29:01 -0700 (PDT) MIME-Version: 1.0 References: <20190412083635.33626-1-Zhiqiang.Hou@nxp.com> <20190412083635.33626-11-Zhiqiang.Hou@nxp.com> <20190612150819.GD15747@redmoon> <20190614104351.GA29955@e121166-lin.cambridge.arm.com> In-Reply-To: <20190614104351.GA29955@e121166-lin.cambridge.arm.com> From: Karthikeyan Mitran Date: Wed, 19 Jun 2019 10:58:49 +0530 Message-ID: Subject: Re: [PATCHv5 10/20] PCI: mobiveil: Fix the INTx process errors To: Lorenzo Pieralisi Cc: "Z.q. Hou" , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "catalin.marinas@arm.com" , "will.deacon@arm.com" , Mingkai Hu , "M.h. Lian" , Xiaowei Bao Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 14, 2019 at 4:14 PM Lorenzo Pieralisi wrote: > > On Fri, Jun 14, 2019 at 12:38:51PM +0530, Karthikeyan Mitran wrote: > > Hi Lorenzo and Hou Zhiqiang > > PAB_INTP_AMBA_MISC_STAT does have other status in the higher bits, it > > should have been masked before checking for the status > > You are the maintainer for this driver, so if there is something to be > changed you must post a patch to that extent, I do not understand what > the above means, write the code to fix it, I won't do it. > > I am getting a bit annoyed with this Mobiveil driver so either you guys > sort this out or I will have to remove it from the kernel. > > > Acked-by: Karthikeyan Mitran > > Ok I assume this means you tested it but according to what you > say above, are there still issues with this code path ? Should > we update the patch ? Tested-by: Karthikeyan Mitran This patch fixes the INTx status extraction and handling, I don't see any need to update this patch. > > Moreover: > > https://kernelnewbies.org/PatchCulture > > Please read it and never top-post. Thank you very much, for the information. > > Thanks, > Lorenzo > > > On Wed, Jun 12, 2019 at 8:38 PM Lorenzo Pieralisi > > wrote: > > > > > > On Fri, Apr 12, 2019 at 08:36:12AM +0000, Z.q. Hou wrote: > > > > From: Hou Zhiqiang > > > > > > > > In the loop block, there is not code to update the loop key, > > > > this patch updates the loop key by re-read the INTx status > > > > register. > > > > > > > > This patch also add the clearing of the handled INTx status. > > > > > > > > Note: Need MV to test this fix. > > > > > > This means INTX were never tested and current code handling them is, > > > AFAICS, an infinite loop which is very very bad. > > > > > > This is a gross bug and must be fixed as soon as possible. > > > > > > I want Karthikeyan ACK and Tested-by on this patch. > > > > > > Lorenzo > > > > > > > Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") > > > > Signed-off-by: Hou Zhiqiang > > > > Reviewed-by: Minghuan Lian > > > > Reviewed-by: Subrahmanya Lingappa > > > > --- > > > > V5: > > > > - Corrected and retouched the subject and changelog. > > > > > > > > drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++---- > > > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > > > > > diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c > > > > index 4ba458474e42..78e575e71f4d 100644 > > > > --- a/drivers/pci/controller/pcie-mobiveil.c > > > > +++ b/drivers/pci/controller/pcie-mobiveil.c > > > > @@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) > > > > /* Handle INTx */ > > > > if (intr_status & PAB_INTP_INTX_MASK) { > > > > shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); > > > > + shifted_status &= PAB_INTP_INTX_MASK; > > > > shifted_status >>= PAB_INTX_START; > > > > do { > > > > for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { > > > > @@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) > > > > dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", > > > > bit); > > > > > > > > - /* clear interrupt */ > > > > - csr_writel(pcie, > > > > - shifted_status << PAB_INTX_START, > > > > + /* clear interrupt handled */ > > > > + csr_writel(pcie, 1 << (PAB_INTX_START + bit), > > > > PAB_INTP_AMBA_MISC_STAT); > > > > } > > > > - } while ((shifted_status >> PAB_INTX_START) != 0); > > > > + > > > > + shifted_status = csr_readl(pcie, > > > > + PAB_INTP_AMBA_MISC_STAT); > > > > + shifted_status &= PAB_INTP_INTX_MASK; > > > > + shifted_status >>= PAB_INTX_START; > > > > + } while (shifted_status != 0); > > > > } > > > > > > > > /* read extra MSI status register */ > > > > -- > > > > 2.17.1 > > > > > > > > > > > > -- Mobiveil INC., CONFIDENTIALITY NOTICE: This e-mail message, including any attachments, is for the sole use of the intended recipient(s) and may contain proprietary confidential or privileged information or otherwise be protected by law. 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