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[209.132.180.67]) by mx.google.com with ESMTP id p3si16884334plo.185.2019.06.19.16.13.40; Wed, 19 Jun 2019 16:13:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730626AbfFSXNR convert rfc822-to-8bit (ORCPT + 99 others); Wed, 19 Jun 2019 19:13:17 -0400 Received: from mga06.intel.com ([134.134.136.31]:51914 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726251AbfFSXNQ (ORCPT ); Wed, 19 Jun 2019 19:13:16 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Jun 2019 16:13:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,394,1557212400"; d="scan'208";a="335325959" Received: from orsmsx110.amr.corp.intel.com ([10.22.240.8]) by orsmga005.jf.intel.com with ESMTP; 19 Jun 2019 16:13:15 -0700 Received: from orsmsx125.amr.corp.intel.com (10.22.240.125) by ORSMSX110.amr.corp.intel.com (10.22.240.8) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 19 Jun 2019 16:13:15 -0700 Received: from orsmsx104.amr.corp.intel.com ([169.254.4.70]) by ORSMSX125.amr.corp.intel.com ([169.254.3.149]) with mapi id 14.03.0439.000; Wed, 19 Jun 2019 16:13:15 -0700 From: "Bowers, AndrewX" To: "intel-wired-lan@lists.osuosl.org" , "netdev@vger.kernel.org" CC: "kernel-janitors@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [Intel-wired-lan] [PATCH][next][V2] ixgbe: fix potential u32 overflow on shift Thread-Topic: [Intel-wired-lan] [PATCH][next][V2] ixgbe: fix potential u32 overflow on shift Thread-Index: AQHVHV2ToRQN8mZnx0izOHLo1fKcGqajrlSQ Date: Wed, 19 Jun 2019 23:13:15 +0000 Message-ID: <26D9FDECA4FBDD4AADA65D8E2FC68A4A1D3F8D26@ORSMSX104.amr.corp.intel.com> References: <20190607181920.23339-1-colin.king@canonical.com> In-Reply-To: <20190607181920.23339-1-colin.king@canonical.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNGIzMzE4YTUtNzgyNi00YTFkLThlOWUtZWExYzJjZTA0ZjU4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUkI2UUFyenVlR3NXSVVwVnNXMFAzTElhWlwvajlCemljYmdKYzhyNFFPZjdcLzBLaVVUTVpRTnNiXC9qaEV1d1IxbiJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.22.254.138] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Intel-wired-lan [mailto:intel-wired-lan-bounces@osuosl.org] On > Behalf Of Colin King > Sent: Friday, June 7, 2019 11:19 AM > To: Keller, Jacob E ; Kirsher, Jeffrey T > ; David S . Miller ; > intel-wired-lan@lists.osuosl.org; netdev@vger.kernel.org > Cc: kernel-janitors@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: [Intel-wired-lan] [PATCH][next][V2] ixgbe: fix potential u32 > overflow on shift > > From: Colin Ian King > > The u32 variable rem is being shifted using u32 arithmetic however it is being > passed to div_u64 that expects the expression to be a u64. > The 32 bit shift may potentially overflow, so cast rem to a u64 before shifting > to avoid this. Also remove comment about overflow. > > Addresses-Coverity: ("Unintentional integer overflow") > Fixes: cd4583206990 ("ixgbe: implement support for SDP/PPS output on X550 > hardware") > Fixes: 68d9676fc04e ("ixgbe: fix PTP SDP pin setup on X540 hardware") > Signed-off-by: Colin Ian King > --- > > V2: update comment > > --- > drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c | 14 ++++---------- > 1 file changed, 4 insertions(+), 10 deletions(-) Tested-by: Andrew Bowers