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[209.132.180.67]) by mx.google.com with ESMTP id 70si17969650plc.253.2019.06.20.02.23.12; Thu, 20 Jun 2019 02:23:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730428AbfFTJXG (ORCPT + 99 others); Thu, 20 Jun 2019 05:23:06 -0400 Received: from foss.arm.com ([217.140.110.172]:55658 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725875AbfFTJXG (ORCPT ); Thu, 20 Jun 2019 05:23:06 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0816C360; Thu, 20 Jun 2019 02:23:05 -0700 (PDT) Received: from e107155-lin (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2178F3F246; Thu, 20 Jun 2019 02:23:03 -0700 (PDT) Date: Thu, 20 Jun 2019 10:23:01 +0100 From: Sudeep Holla To: peng.fan@nxp.com Cc: robh+dt@kernel.org, mark.rutland@arm.com, jassisinghbrar@gmail.com, f.fainelli@gmail.com, kernel@pengutronix.de, linux-imx@nxp.com, shawnguo@kernel.org, festevam@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, andre.przywara@arm.com, van.freenix@gmail.com, Sudeep Holla Subject: Re: [PATCH V2 2/2] mailbox: introduce ARM SMC based mailbox Message-ID: <20190620092301.GD1248@e107155-lin> References: <20190603083005.4304-1-peng.fan@nxp.com> <20190603083005.4304-3-peng.fan@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190603083005.4304-3-peng.fan@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jun 03, 2019 at 04:30:05PM +0800, peng.fan@nxp.com wrote: > From: Peng Fan > > This mailbox driver implements a mailbox which signals transmitted data > via an ARM smc (secure monitor call) instruction. The mailbox receiver > is implemented in firmware and can synchronously return data when it > returns execution to the non-secure world again. > An asynchronous receive path is not implemented. > This allows the usage of a mailbox to trigger firmware actions on SoCs > which either don't have a separate management processor or on which such > a core is not available. A user of this mailbox could be the SCP > interface. > > Modified from Andre Przywara's v2 patch > https://lore.kernel.org/patchwork/patch/812999/ > > Cc: Andre Przywara > Signed-off-by: Peng Fan > --- > > V2: > Add interrupts notification support. > > drivers/mailbox/Kconfig | 7 ++ > drivers/mailbox/Makefile | 2 + > drivers/mailbox/arm-smc-mailbox.c | 190 ++++++++++++++++++++++++++++++++ > include/linux/mailbox/arm-smc-mailbox.h | 10 ++ > 4 files changed, 209 insertions(+) > create mode 100644 drivers/mailbox/arm-smc-mailbox.c > create mode 100644 include/linux/mailbox/arm-smc-mailbox.h > > diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig > index 595542bfae85..c3bd0f1ddcd8 100644 > --- a/drivers/mailbox/Kconfig > +++ b/drivers/mailbox/Kconfig > @@ -15,6 +15,13 @@ config ARM_MHU > The controller has 3 mailbox channels, the last of which can be > used in Secure mode only. > > +config ARM_SMC_MBOX > + tristate "Generic ARM smc mailbox" > + depends on OF && HAVE_ARM_SMCCC > + help > + Generic mailbox driver which uses ARM smc calls to call into > + firmware for triggering mailboxes. > + > config IMX_MBOX > tristate "i.MX Mailbox" > depends on ARCH_MXC || COMPILE_TEST > diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile > index c22fad6f696b..93918a84c91b 100644 > --- a/drivers/mailbox/Makefile > +++ b/drivers/mailbox/Makefile > @@ -7,6 +7,8 @@ obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o > > obj-$(CONFIG_ARM_MHU) += arm_mhu.o > > +obj-$(CONFIG_ARM_SMC_MBOX) += arm-smc-mailbox.o > + > obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o > > obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o > diff --git a/drivers/mailbox/arm-smc-mailbox.c b/drivers/mailbox/arm-smc-mailbox.c > new file mode 100644 > index 000000000000..fef6e38d8b98 > --- /dev/null > +++ b/drivers/mailbox/arm-smc-mailbox.c > @@ -0,0 +1,190 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2016,2017 ARM Ltd. > + * Copyright 2019 NXP > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define ARM_SMC_MBOX_USE_HVC BIT(0) > +#define ARM_SMC_MBOX_USB_IRQ BIT(1) > + > +struct arm_smc_chan_data { > + u32 function_id; > + u32 flags; > + int irq; > +}; > + > +static int arm_smc_send_data(struct mbox_chan *link, void *data) > +{ > + struct arm_smc_chan_data *chan_data = link->con_priv; > + struct arm_smccc_mbox_cmd *cmd = data; > + struct arm_smccc_res res; > + u32 function_id; > + > + if (chan_data->function_id != UINT_MAX) > + function_id = chan_data->function_id; > + else > + function_id = cmd->a0; > + > + if (chan_data->flags & ARM_SMC_MBOX_USE_HVC) > + arm_smccc_hvc(function_id, cmd->a1, cmd->a2, cmd->a3, cmd->a4, > + cmd->a5, cmd->a6, cmd->a7, &res); > + else > + arm_smccc_smc(function_id, cmd->a1, cmd->a2, cmd->a3, cmd->a4, > + cmd->a5, cmd->a6, cmd->a7, &res); > + So how will the SMC/HVC handler in EL3/2 find which mailbox is being referred with this command ? I prefer 2nd argument to be the mailbox number. -- Regards, Sudeep