Received: by 2002:a25:ab43:0:0:0:0:0 with SMTP id u61csp2031433ybi; Thu, 20 Jun 2019 08:02:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqygNFbxM8U8Yg2jEgxk+IQrvE7S9JdrucMNqBpHNNxFLVwLbBlzN1bpu70N64NDFT/rvuJu X-Received: by 2002:aa7:8b51:: with SMTP id i17mr13350704pfd.33.1561042960374; Thu, 20 Jun 2019 08:02:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561042960; cv=none; d=google.com; s=arc-20160816; b=yn/sG4mtutxkRG24WAJMlVC0WcjkXa7LPv7jR1c79aQMYom8XRHoak7m/IDtTQ3uu6 w2zfkRXsOX0+8SnpGLth/5QvW7IzYgpHx0T+P9JqwG8q9obYGpSB76LoMqULok8ZIU4T 48Sx0cCUC+WUb1w+k3MxLw+IkMh9rzaAUiS2aH9k/wlPWz/0wstGq0Eg5Ab9Mccg5Pfj QX/q4oLkO8VVsCVcYUa27LKlU/1YNCVCcthmYh3wkB0iSrF2mspkriaOiqQhAgCAKzKa 0H2gB7QsF37f4YW7Cb+ONnvFfV1TPBhdAYkz7vIh0QYrbbhMmNTSlXjE+bsHRN+EEEgm DN5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=iGJO1VOPXnwiO9fEhZqN6X/eRe30yCuqhTibmCsxXjw=; b=YB6He0ZKZkAzg1HOMA+fvDeNDRiMEZ860s7WfDLruSfp5YNdAS2dYrHnRm+mcZgjDP AoL8JhUEtaK+D4jHQZdibuutcCao9zYida1B8/bvNLbKFygtNF/0RfPM7Qh/wxrn5HIF z4VuxEHKxgdBtwbhtGkKg1MvQn/3mFHa3Lk+NrmroDiymIb5fsmPOGySWOr1ATxVEsNq L40JaEksdL7SUQJ/T7RSAlJGyuozozngZVQbznrpt5WQBc3MxrCkB7ocJ3DwJi7dLV8K M72nC3irtEra5DVjIluxsqgUJA8Y3NrniX7XEWAqaor77FAouqwa2orc0NkuFSv6jHDG gUFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=D26PYrCy; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j3si14136940pfh.178.2019.06.20.08.02.23; Thu, 20 Jun 2019 08:02:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=D26PYrCy; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731655AbfFTPAX (ORCPT + 99 others); Thu, 20 Jun 2019 11:00:23 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:37462 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726654AbfFTPAW (ORCPT ); Thu, 20 Jun 2019 11:00:22 -0400 Received: by mail-wm1-f68.google.com with SMTP id f17so3510135wme.2 for ; Thu, 20 Jun 2019 08:00:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=iGJO1VOPXnwiO9fEhZqN6X/eRe30yCuqhTibmCsxXjw=; b=D26PYrCydSgAvlyMXHUOVwEHkqVfkO3eIU+Hw97fyOOaJhSd3TTaERMVpGTO01BA/a WTSvDNybjRgNPVBPg4AKhb1YAxpFMudHhPqlYRRljgWdVKAIU/KpiTqqKN8rXdc89coc oj2pe8nJd5BX4Oh6O9WDO/g+AzqTXdUweRXgwg987O3Rw6EetJEkL3LvTo2QJI4PK6H4 zfrTGY5oSiQlU1ea/EeeFjW50K9hvMIaICcKbSXt7380xxh5jQw7tq6m+aokZ30/c5+Q mg0UYoiwFRcvvdV0ToIAJ90+6wcvCSVLdZLbbLXCfMKQ6eRNoe+8rSMk9w0tkffrhgHu j5TA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=iGJO1VOPXnwiO9fEhZqN6X/eRe30yCuqhTibmCsxXjw=; b=A9MOwlxZMtZoQgkt3VQ+ESatUcbEvvTo0r8PlJd0p3pMlkz2dAmedv9ltXxKFPM2rL i+/OvgYy7pzO8zHKM35AJXdinlsv+Q7eGYrS9oGgPlc4Fpol//gwtoMFoZwqB9eKvqxZ Lggh+q91BbvG4G5Iax8gKscdEJHEWaFb8DE4TMDsVJegtybRNjQIpQeEasaJ/F8qUWBB dlq9JxNegDuoADDlD5HyaM3ifRCi+Pc4B9YfwxAcLOIKGuKZWabIRUrqamagpfHo6x7t ABLtDTkgR55QK4StvPvTx98QuDQ1L1qEFtY0w/+jDcoig5fH6w61lF+oiCK3LOxjF0lJ 4MNg== X-Gm-Message-State: APjAAAVPiggBxS1I3tlMCb5DcDtVNciNHYrV6a4GdIvGzO0vxUbyZlMt Z/h52RIxsSHBL3BubiufUM0T2A== X-Received: by 2002:a1c:5546:: with SMTP id j67mr71050wmb.80.1561042820164; Thu, 20 Jun 2019 08:00:20 -0700 (PDT) Received: from bender.baylibre.local (lmontsouris-657-1-212-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.gmail.com with ESMTPSA id o126sm6802520wmo.1.2019.06.20.08.00.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Jun 2019 08:00:19 -0700 (PDT) From: Neil Armstrong To: jbrunet@baylibre.com, khilman@baylibre.com Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, martin.blumenstingl@googlemail.com, Neil Armstrong Subject: [RFC/RFT 00/14] arm64: g12a: add support for DVFS Date: Thu, 20 Jun 2019 16:59:59 +0200 Message-Id: <20190620150013.13462-1-narmstrong@baylibre.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The G12A/G12B Socs embeds a specific clock tree for each CPU cluster : cpu_clk / cpub_clk | \- cpu_clk_dyn | | \- cpu_clk_premux0 | | |- cpu_clk_postmux0 | | | |- cpu_clk_dyn0_div | | | \- xtal/fclk_div2/fclk_div3 | | \- xtal/fclk_div2/fclk_div3 | \- cpu_clk_premux1 | |- cpu_clk_postmux1 | | |- cpu_clk_dyn1_div | | \- xtal/fclk_div2/fclk_div3 | \- xtal/fclk_div2/fclk_div3 \ sys_pll / sys1_pll This patchset adds notifiers on cpu_clk / cpub_clk, cpu_clk_dyn, cpu_clk_premux0 and sys_pll / sys1_pll to permit change frequency of the CPU clock in a safe way as recommended by the vendor Documentation and reference code. This patchset : - introduces needed core and meson clk changes - adds support for the G12B second cluster clock measurer ids - protects clock measurer from cooncurent measures - adds the clock notifiers - moves the G12A DT to a common g12a-common dtsi - adds the G12A and G12B OPPs - enables DVFS on all supported boards Dependencies: - PWM AO input order fix at [1] - PWM enhancements from Martin at [2] [1] https://patchwork.kernel.org/patch/11006835/ [2] https://patchwork.kernel.org/patch/11006835/ Neil Armstrong (14): pinctrl: meson-g12a: add pwm_a on GPIOE_2 pinmux clk: core: introduce clk_hw_set_parent() clk: meson: regmap: export regmap_div ops functions clk: meson: eeclk: add setup callback soc: amlogic: meson-clk-measure: protect measure with a mutex soc: amlogic: meson-clk-measure: add G12B second cluster cpu clk clk: meson: g12a: add notifiers to handle cpu clock change clk: meson: g12a: expose CPUB clock ID for G12B arm64: dts: move common G12A & G12B modes to meson-g12-common.dtsi arm64: dts: meson-g12-common: add pwm_a on GPIOE_2 pinmux arm64: dts: meson-g12a: add cpus OPP table arm64: dts: meson-g12a: enable DVFS on G12A boards arm64: dts: meson-g12b: add cpus OPP tables arm64: dts: meson-g12b-odroid-n2: enable DVFS .../boot/dts/amlogic/meson-g12-common.dtsi | 2464 +++++++++++++++++ .../boot/dts/amlogic/meson-g12a-sei510.dts | 55 + .../boot/dts/amlogic/meson-g12a-u200.dts | 55 + .../boot/dts/amlogic/meson-g12a-x96-max.dts | 52 + arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 2462 +--------------- .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 96 + arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 141 +- drivers/clk/clk.c | 5 + drivers/clk/meson/clk-regmap.c | 10 +- drivers/clk/meson/clk-regmap.h | 5 + drivers/clk/meson/g12a.c | 500 +++- drivers/clk/meson/meson-eeclk.c | 6 + drivers/clk/meson/meson-eeclk.h | 1 + drivers/pinctrl/meson/pinctrl-meson-g12a.c | 9 + drivers/soc/amlogic/meson-clk-measure.c | 14 +- include/dt-bindings/clock/g12a-clkc.h | 1 + include/linux/clk-provider.h | 1 + 17 files changed, 3412 insertions(+), 2465 deletions(-) create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi -- 2.21.0