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[73.95.159.87]) by smtp.gmail.com with ESMTPSA id p25sm14832445iol.48.2019.06.24.14.23.39 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 24 Jun 2019 14:23:39 -0700 (PDT) Date: Mon, 24 Jun 2019 14:23:39 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: Yash Shah cc: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, palmer@sifive.com, aou@eecs.berkeley.edu, sachin.ghadi@sifive.com Subject: Re: [PATCH] riscv: dts: Re-organize SPI DT nodes In-Reply-To: <1561375453-3135-1-git-send-email-yash.shah@sifive.com> Message-ID: References: <1561375453-3135-1-git-send-email-yash.shah@sifive.com> User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 24 Jun 2019, Yash Shah wrote: > As per the General convention, define only device DT node in SOC DTSi > file with status = "disabled" and enable device in Board DTS file with > status = "okay" > > Reported-by: Anup Patel > Signed-off-by: Yash Shah This is a good start, but should also cover the other I/O devices in the chip DT file. The mandatory internal devices, like the PRCI and PLIC, can stay the way they are. - Paul