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[209.132.180.67]) by mx.google.com with ESMTP id a5si11473830pgt.281.2019.06.24.20.44.47; Mon, 24 Jun 2019 20:45:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@crapouillou.net header.s=mail header.b=dnWMNGFw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727755AbfFXW6b (ORCPT + 99 others); Mon, 24 Jun 2019 18:58:31 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:33254 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727027AbfFXW63 (ORCPT ); Mon, 24 Jun 2019 18:58:29 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1561417106; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+rI3XtKq+pny7a5Hom8ysd9GhWX9mZe5NPQkRd3rOHA=; b=dnWMNGFwA14HWZlRDOrezEdLd3fj6IFHk+99gu5dJIAcvQMvJd9Cb/zLC/Q4oLlrS96CJL a1pLUaQK330A+bMh0bXZw2deOW5lW25siOH7vbSrANnwvJRguNQmR5iojyuDcPOBFZvx57 Rykm3A4OiVx7flPTn2QRQvdE56r69mU= From: Paul Cercueil To: Daniel Lezcano , Thomas Gleixner , Ralf Baechle , Paul Burton , James Hogan , Jonathan Corbet , Michael Turquette , Stephen Boyd , Jason Cooper , Marc Zyngier , Lee Jones Cc: Mathieu Malaterre , od@zcrc.me, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-doc@vger.kernel.org, linux-clk@vger.kernel.org, Paul Cercueil , Artur Rojek , Rob Herring Subject: [PATCH v13 08/13] clk: jz4740: Add TCU clock Date: Tue, 25 Jun 2019 00:57:54 +0200 Message-Id: <20190624225759.18299-9-paul@crapouillou.net> In-Reply-To: <20190624225759.18299-1-paul@crapouillou.net> References: <20190624225759.18299-1-paul@crapouillou.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the missing TCU clock to the list of clocks supplied by the CGU for the JZ4740 SoC. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek Acked-by: Stephen Boyd Acked-by: Rob Herring --- Notes: v5: New patch v6-v13: No change drivers/clk/ingenic/jz4740-cgu.c | 6 ++++++ include/dt-bindings/clock/jz4740-cgu.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/clk/ingenic/jz4740-cgu.c b/drivers/clk/ingenic/jz4740-cgu.c index c77f4e1506dc..176d911b5839 100644 --- a/drivers/clk/ingenic/jz4740-cgu.c +++ b/drivers/clk/ingenic/jz4740-cgu.c @@ -203,6 +203,12 @@ static const struct ingenic_cgu_clk_info jz4740_cgu_clocks[] = { .parents = { JZ4740_CLK_EXT, -1, -1, -1 }, .gate = { CGU_REG_CLKGR, 5 }, }, + + [JZ4740_CLK_TCU] = { + "tcu", CGU_CLK_GATE, + .parents = { JZ4740_CLK_EXT, -1, -1, -1 }, + .gate = { CGU_REG_CLKGR, 1 }, + }, }; static void __init jz4740_cgu_init(struct device_node *np) diff --git a/include/dt-bindings/clock/jz4740-cgu.h b/include/dt-bindings/clock/jz4740-cgu.h index 6ed83f926ae7..e82d77028581 100644 --- a/include/dt-bindings/clock/jz4740-cgu.h +++ b/include/dt-bindings/clock/jz4740-cgu.h @@ -34,5 +34,6 @@ #define JZ4740_CLK_ADC 19 #define JZ4740_CLK_I2C 20 #define JZ4740_CLK_AIC 21 +#define JZ4740_CLK_TCU 22 #endif /* __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ */ -- 2.21.0.593.g511ec345e18