Received: by 2002:a25:f815:0:0:0:0:0 with SMTP id u21csp3341711ybd; Tue, 25 Jun 2019 00:35:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqz0j3Q83Fl7Hr4dj/02mwN+ZHqnJu1gz52hXO6GONRnRZfXNEfINqgayXpV6drjNSOYwcJ2 X-Received: by 2002:a17:902:9896:: with SMTP id s22mr22936196plp.4.1561448121512; Tue, 25 Jun 2019 00:35:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561448121; cv=none; d=google.com; s=arc-20160816; b=JcLqGQ4xRupDdOXBSzY7UBNm+v3KIJV+WR71Pe6VSEj52JqZuChH/vAuthuR3tI8Uc RLdsurh/H+pc3Qs9IGN6epChdMtuvst4j9Zd9OwE6dF9gkjhQzN4hX1/YYpvAcSUybeg o+UjG+r++BaHJ+2fmLKz7nyviDm7E6XEXoJ/OPEzPP8eSufbUOaGVIzZRFRzhekp2SOc C+dbGJXWvbAd9a/naLqKwcnIs2b/PKA7/StsQ9y4MH6EBeICwOl5CP7uNtS9XXZhRuvy 6JHOeVJW9PcqsA5w7K7y6ZhaXVydbGx71vq1oRiP47R1os45RVqW1tyTvjLBuIF+LjqP 8g5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=bZx41pe3ltdVv3EIn0GuGKftEaz4CsQVZHZgkIyQTRQ=; b=GuqSNW2BRDYjN5mzbSzSTGGdfC6AnS8Z/t+8CTvNfxbNyKLmyr5ZM6TazbyzC1YSrH 9Ylb5fS5CmJTa9jdecskl8UkjjfIheTxVDg7H7ZLC/WENZmqGuPClY1FO3JGT8pCidI1 8WIaOfnDB2CO51dgqZE5ovShj5hKAPhwBqI17ObafoufYrkDsILEZ/n9gS28rbxUMMTY wAbaW2r7LtW2I7PpcCqMqx9SYGMXztGCr+ETl3/B6+TAV8luyy4J/38YHlwvZY3/RjCz 1v0UJ+SIY64dmaP5Op6tcoJaukoNPLOWCIdrH//+LVfjdM11/tSd/2X5WqqiTrvB8DYr H4BQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n11si11654853pgq.498.2019.06.25.00.35.05; Tue, 25 Jun 2019 00:35:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729051AbfFYGLh (ORCPT + 99 others); Tue, 25 Jun 2019 02:11:37 -0400 Received: from verein.lst.de ([213.95.11.211]:59765 "EHLO newverein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726495AbfFYGLg (ORCPT ); Tue, 25 Jun 2019 02:11:36 -0400 Received: by newverein.lst.de (Postfix, from userid 2407) id 413AB68B02; Tue, 25 Jun 2019 08:11:04 +0200 (CEST) Date: Tue, 25 Jun 2019 08:11:04 +0200 From: Christoph Hellwig To: Hillf Danton Cc: Christoph Hellwig , Vineet Gupta , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Helge Deller , Vladimir Murzin , linux-snps-arc@lists.infradead.org, linux-arm-kernel@lists.infradead.org, openrisc@lists.librecores.org, linux-parisc@vger.kernel.org, linux-xtensa@linux-xtensa.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 5/7] dma-direct: handle DMA_ATTR_NON_CONSISTENT in common code Message-ID: <20190625061104.GB28986@lst.de> References: <20190614144431.21760-1-hch@lst.de> <20190614144431.21760-6-hch@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190614144431.21760-6-hch@lst.de> User-Agent: Mutt/1.5.17 (2007-11-01) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Jun 16, 2019 at 06:08:40PM +0800, Hillf Danton wrote: > Literally, any cpu (call it cpuW) other than pcx12 and pcx1 will no longer do > dma alloc for any device with this patch applied. Yes. And that is not a chance from the previous code, where only pcx1 and pcx12 could do coherent allocations, > On the other hand, > !dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_NON_CONSISTENT) will ask > any cpu to do dma alloc, regardless of pcx1. This patch works imo unless cpuW > plays games only with devices that are dma coherent. I doubt it is true. I can't parse these two sentences. But to explains the bits mentioned here - dev_is_dma_coherent will return if a device is coherently attached vs the cpu. This will never be true for the parisc direct mapping. DMA_ATTR_NON_CONSISTENT asks for a non-coherent mapping that needs to be explicitly synced. This support now is in the dma-direct core code, and this is what the parisc specific devices used on the non-pcxl systems use, as they do not support dma coherency at all. (the story slightly changes when using an iommu, but that is irrelevant here)