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From:   Jingoo Han <jingoohan1@gmail.com>
To:     Vidya Sagar <vidyas@nvidia.com>,
        "gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
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CC:     "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
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        "kthota@nvidia.com" <kthota@nvidia.com>,
        "mmaddireddy@nvidia.com" <mmaddireddy@nvidia.com>,
        "sagar.tv@gmail.com" <sagar.tv@gmail.com>,
        Han Jingoo <jingoohan1@gmail.com>
Subject: Re: [PATCH V8 2/3] PCI: dwc: Cleanup DBI,ATU read and write APIs
Thread-Topic: [PATCH V8 2/3] PCI: dwc: Cleanup DBI,ATU read and write APIs
Thread-Index: AQHVKk1mZn06E4x3n0K7Ma23pehWQqasEKv6
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Date:   Tue, 25 Jun 2019 08:47:39 +0000
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 <20190624052611.11279-2-vidyas@nvidia.com>
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On 6/24/19, 2:26 PM, Vidya Sagar wrote:
>
> Cleanup DBI read and write APIs by removing "__" (underscore) from their
> names as there are no no-underscore versions and the underscore versions
> are already doing what no-underscore versions typically do. It also remov=
es
> passing dbi/dbi2 base address as one of the arguments as the same can be
> derived with in read and write APIs. Since dw_pcie_{readl/writel}_dbi()
> APIs can't be used for ATU read/write as ATU base address could be
> different from DBI base address, this patch attempts to implement
> ATU read/write APIs using ATU base address without using
> dw_pcie_{readl/writel}_dbi() APIs.
>
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> Changes from v7:
> * Based on suggestion from Jingoo Han, moved implementation of readl, wri=
tel for ATU
>   region to separate APIs dw_pcie_{read/write}_atu() in pcie-designware.c=
 file and
>   calling them from pcie-designware.h file.
>
> Changes from v6:
> * Modified ATU read/write APIs to use implementation specific DBI read/wr=
ite
>   APIs if present.
>
> Changes from v5:
> * Removed passing base address as one of the arguments as the same can be=
 derived within
>   the API itself.
> * Modified ATU read/write APIs to call dw_pcie_{write/read}() API
>
> Changes from v4:
> * This is a new patch in this series
>
>  drivers/pci/controller/dwc/pcie-designware.c | 28 +++++------
>  drivers/pci/controller/dwc/pcie-designware.h | 51 +++++++++++++-------
>  2 files changed, 45 insertions(+), 34 deletions(-)

.......

> +u32 dw_pcie_read_atu(struct dw_pcie *pci, u32 reg, size_t size)
> +{
> +	int ret;
> +	u32 val;
> +
> +	if (pci->ops->read_dbi)
> +		return pci->ops->read_dbi(pci, pci->atu_base, reg, size);
> +
> +	ret =3D dw_pcie_read(pci->atu_base + reg, size, &val);
> +	if (ret)
> +		dev_err(pci->dev, "Read ATU address failed\n");
> +
> +	return val;
> +}
> +EXPORT_SYMBOL_GPL(dw_pcie_read_atu);

Don't export dw_pcie_read_atu unnecessarily.

> +
> +void dw_pcie_write_atu(struct dw_pcie *pci, u32 reg, size_t size, u32 va=
l)
> +{
> +	int ret;
> +
> +	if (pci->ops->write_dbi) {
> +		pci->ops->write_dbi(pci, pci->atu_base, reg, size, val);
> +		return;
> +	}
> +
> +	ret =3D dw_pcie_write(pci->atu_base + reg, size, val);
> +	if (ret)
> +		dev_err(pci->dev, "Write ATU address failed\n");
> +}
> +EXPORT_SYMBOL_GPL(dw_pcie_write_atu);

Don't export dw_pcie_write_atu unnecessarily.

Best regards,
Jingoo Han

.....