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[209.132.180.67]) by mx.google.com with ESMTP id c1si1335646plr.405.2019.06.25.15.36.39; Tue, 25 Jun 2019 15:36:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=TJcRicsu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726432AbfFYWe6 (ORCPT + 99 others); Tue, 25 Jun 2019 18:34:58 -0400 Received: from mail.kernel.org ([198.145.29.99]:39948 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726320AbfFYWe6 (ORCPT ); Tue, 25 Jun 2019 18:34:58 -0400 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1FCBF205ED; Tue, 25 Jun 2019 22:34:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561502097; bh=/kwIgl7T7RUB6O8AVjTRLgNL7U9K6Zhd50WUYjJcszk=; h=In-Reply-To:References:To:From:Subject:Cc:Date:From; b=TJcRicsuQdvPQg9FeTYbsi/IhN1JdT58h299gkXyrGdyEDhz+ZXUCdRDp0ABWeF67 mfNgTTWW7vB2AB93S1BledWN7Ici0mXVLEkXdh1PtPnaCLdWvIrJvmKCZN0+p9w5ew eHnOpg3F3NLVVen8lN7NjAb6z6kZ0nPHR1rtx0d4= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: References: <20190604015928.23157-1-Anson.Huang@nxp.com> <20190604015928.23157-3-Anson.Huang@nxp.com> <20190606162543.EFFB820645@mail.kernel.org> <20190607180039.611C7208C0@mail.kernel.org> <20190610151425.D8139207E0@mail.kernel.org> To: "bjorn.andersson@linaro.org" , "catalin.marinas@arm.com" , "devicetree@vger.kernel.org" , "dinguyen@kernel.org" , "enric.balletbo@collabora.com" , "festevam@gmail.com" , "horms+renesas@verge.net.au" , "jagan@amarulasolutions.com" , "kernel@pengutronix.de" , "l.stach@pengutronix.de" , "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "mark.rutland@arm.com" , "maxime.ripard@bootlin.com" , "mturquette@baylibre.com" , "olof@lixom.net" , "robh+dt@kernel.org" , "s.hauer@pengutronix .de" , "shawnguo@kernel.org" , "will.deacon@arm.com" , Abel Vesa , Aisheng Dong , Anson Huang , Jacky Bai , Leonard Crestez From: Stephen Boyd Subject: RE: [PATCH V3 3/4] clk: imx: Add support for i.MX8MN clock driver Cc: dl-linux-imx User-Agent: alot/0.8.1 Date: Tue, 25 Jun 2019 15:34:56 -0700 Message-Id: <20190625223457.1FCBF205ED@mail.kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Anson Huang (2019-06-10 19:06:22) > > > > > > Sorry, I am still a little confused, all the clock > > > register(clk_register()) are via each different clock types like > > > imx_clk_gate4/imx_clk_pll14xx, if using clk_hw_register, means we need > > > to re-write the clock driver using different clk register method, that > > > will make the driver completely different from i.mx8mq/i.mx8mm, they > > > are actually same series of SoC as i.mx8mn, it will introduce many > > confusion, is my understanding correct? And is it OK to just keep what = it is > > and make them all aligned? > > > > >=20 > > Ok, the problem I'm trying to point out is that clk registrations need = to be > > undone, i.e. clk_unregister() needs to be called, when the driver fails= to > > probe. devm_*() is one way to do this, but if you have other ways of > > removing all the registered clks then that works too. Makes sense? >=20 > Yes, it makes sense. Do you think it is OK to add an imx_unregister_clock= s() API, then > call it in every place of returning failure in .probe function? If yes, I= will add it and also > fix it in i.MX8MQ driver which uses platform driver model but does NOT ha= ndle this case.=20 >=20 > base =3D devm_platform_ioremap_resource(pdev, 0); > - if (WARN_ON(IS_ERR(base))) > - return PTR_ERR(base); > + if (WARN_ON(IS_ERR(base))) { > + ret =3D PTR_ERR(base); > + goto unregister_clks; > + } >=20 > pr_err("failed to register clks for i.MX8MN\n"); > - return -EINVAL; > + goto unregister_clks; > } >=20 > return 0; > + > +unregister_clks: > + imx_unregister_clocks(clks, ARRAY_SIZE(clks)); > + > + return ret; >=20 > +void imx_unregister_clocks(struct clk *clks[], unsigned int count) > +{ > + unsigned i; > + > + for (i =3D 0; i < count; i++) > + clk_unregister(clks[i]); > +} > + >=20 Yes, looks better.