Received: by 2002:a25:f815:0:0:0:0:0 with SMTP id u21csp1767671ybd; Thu, 27 Jun 2019 01:03:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqwsFY2C2gnI0NR7YCMdHHhd3Ei5pw3ZsN0N9Cpp4mTK6oFy1FNywZQUTds9II+LNtHRtzsT X-Received: by 2002:a17:90a:8d0d:: with SMTP id c13mr4216448pjo.137.1561622605345; Thu, 27 Jun 2019 01:03:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561622605; cv=none; d=google.com; s=arc-20160816; b=mVWjMdOTP4oELR1UCcH2EV1qSAc93RnitDfTy0LkR+8nVYVXn6Dyp2Pa7jR/P/RHOI +qsh9MCl8I7pBbdvjixon72XyCTUXdsSVCMfAfzYdQhkzaEJxpxNk7+I6BjRlYGhtQrM bMhaJf4pM3ehqTtilvZwYTiPQ8re5gFb4b8nikwp7Y2c46n6pj285T1FUGNrFzuTaGP5 KAuQ8G/r9g8sA0/n7K/ImmLc8AHK2l2iw2Pg11Ff8OVErhxu83hrIX0CjEGjVyqQC7jo u81dLalp4muTJI75lMog50EqEL1Nt/jRE9FsMDhQWGKCSw/pN5quObBxliv3SUGDlED6 uNOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=auhgjfUbYgr6jYJaWKyvKU7zwysYxee/YgVhiL7KBOw=; b=pexL7v4CmHHXtuvEdbM7A1zqhKCIpuRPDcflorfJ0S3rQC2C5HQl8Rr56hGhOVSIjC 1W/HOAulDLOyfa3L04IE/TA2loqVtkR2kwV/vLLIy/l2LqgRZUk6vW1JczRpLC1Hb5DT VSBf6F/qqJJoc9Iiz0UqzYd8QnX8QkeQ/DQxMZoiiaT5Nw3vV6t+yCtC+P/SjM9sv9wg 2Rrs12rHgQE7j3aPpzGNPX7ePfEpP2JmZdrwn8jUHCD0EuCgwl0fw9D4NhgVZjIQuMMc RyRkNnI1wWu+qxqmoIRm3wu5g04d/Q3+rD5zggdREIU5Rv9gnHcII/uWP9eEHpYqUjLq qDwQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a32si4561436pje.7.2019.06.27.01.03.05; Thu, 27 Jun 2019 01:03:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726416AbfF0IB0 (ORCPT + 99 others); Thu, 27 Jun 2019 04:01:26 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:38084 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726101AbfF0IBZ (ORCPT ); Thu, 27 Jun 2019 04:01:25 -0400 X-UUID: a61b840fda2c490888e41684eee737f0-20190627 X-UUID: a61b840fda2c490888e41684eee737f0-20190627 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1028844314; Thu, 27 Jun 2019 16:01:20 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS33N1.mediatek.inc (172.27.4.75) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 27 Jun 2019 16:01:19 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (172.27.4.253) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 27 Jun 2019 16:01:17 +0800 From: Jitao Shi To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , , David Airlie , Matthias Brugger CC: Jitao Shi , Thierry Reding , Ajay Kumar , Inki Dae , Rahul Sharma , Sean Paul , Vincent Palatin , Andy Yan , Philipp Zabel , Russell King , , , , , , , Sascha Hauer , , , , , , Subject: [v5 0/7] Support dsi for mt8183 Date: Thu, 27 Jun 2019 16:01:08 +0800 Message-ID: <20190627080116.40264-1-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Change since v4: - move mipi_dsi_host_unregiter() to .remove() - fine tune add frame size control coding style - change the data type of data_rate as u32, and add DIV_ROUND_UP_ULL - use div_u64 when 8000000000ULL / dsi->data_rate. Changes since v3 - add one more 'tab' for bitwise define. - add Tested-by: Ryan Case and Reviewed-by: CK Hu . - remove compare da_hs_zero to da_hs_prepare. Changes since v2: - change the video timing calc method - fine the dsi and mipitx init sequence - fine tune commit msg Changes since v1: - separate frame size and reg commit control independent patches. - fix some return values in probe - remove DSI_CMDW0 in "CMDQ reg address of mt8173 is different with mt2701" Jitao Shi (7): drm/mediatek: move mipi_dsi_host_register to probe drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701 drm/mediatek: add dsi reg commit disable control drm/mediatek: add frame size control drm/mediatek: add mt8183 dsi driver support drm/mediatek: change the dsi phytiming calculate method drm: mediatek: adjust dsi and mipi_tx probe sequence drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +- drivers/gpu/drm/mediatek/mtk_dsi.c | 223 ++++++++++++++++++------- 2 files changed, 160 insertions(+), 65 deletions(-) -- 2.21.0