Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Date:   Fri, 28 Jun 2019 11:12:50 +0200
From:   Miquel Raynal <miquel.raynal@bootlin.com>
To:     masonccyang@mxic.com.tw
Cc:     anders.roxell@linaro.org, bbrezillon@kernel.org,
        broonie@kernel.org, christophe.kerello@st.com,
        computersforpeace@gmail.com, devicetree@vger.kernel.org,
        dwmw2@infradead.org, jianxin.pan@amlogic.com, juliensu@mxic.com.tw,
        lee.jones@linaro.org, liang.yang@amlogic.com,
        linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
        marek.vasut@gmail.com, paul@crapouillou.net, paul.burton@mips.com,
        richard@nod.at, robh+dt@kernel.org, stefan@agner.ch,
        vigneshr@ti.com
Subject: Re: [PATCH v4 2/2] dt-bindings: mtd: Document Macronix raw NAND
 controller bindings
Message-ID: <20190628111250.34da11be@xps13>
In-Reply-To: <OFF895B48A.00F391C1-ON48258427.002F8256-48258427.003249E0@mxic.com.tw>
References: <1561443056-13766-1-git-send-email-masonccyang@mxic.com.tw>
        <1561443056-13766-3-git-send-email-masonccyang@mxic.com.tw>
        <20190627192609.0965f6d5@xps13>
        <OFFBD1710A.54AC467B-ON48258427.0023FCA3-48258427.00255B71@mxic.com.tw>
        <20190628094250.1fd84505@xps13>
        <OFF895B48A.00F391C1-ON48258427.002F8256-48258427.003249E0@mxic.com.tw>
Organization: Bootlin
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8BIT
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Hi Mason,

masonccyang@mxic.com.tw wrote on Fri, 28 Jun 2019 17:09:16 +0800:

> Hi Miquel,
> 
> > 
> > Please always Cc: Rob (robh+dt@kernel.org) when you send bindings
> > related patches.  
> 
> Understood. thanks for your remind.
> 
> 
> > >   
> > > >   
> > > > > +- reg: should contain 1 entrie for the registers   
> > > > 
> > > >                            entry
> > > >   
> > > > > +- reg-names: should contain "regs"   
> > > > 
> > > > Not sure you need that?   
> > > 
> > > for a base address of ctlr registers.  
> > 
> > Yes I know, I mean: you don't necessarily need the 'reg-names' property
> > as it is supposed that the only entry will be the IP registers (unless
> > there are more). I don't know what's Rob preference here but I would
> > either drop the reg-names property or enhance the name, "regs" is
> > terribly not descriptive.  
> 
> Got it, any comment is appreciated for either drop the reg-names property 
> or enhance the name.
> 
> >   
> > > > > +- interrupts: interrupt line connected to this NAND controller
> > > > > +- clock-names: should contain "ps_clk", "send_clk" and   
> "send_dly_clk"
> > > > > +- clocks: should contain 3 entries for the "ps_clk", "send_clk"   
> and
> > > > > +    "send_dly_clk" clocks   
> > > > 
> > > > s/entries/phandles/ ?   
> > > 
> > > ?
> > > as I know that kernel views the phandle values as device tree   
> structure
> > > information instead of device tree data and thus does not store them   
> as
> > > properties.  
> > 
> > The bindings have nothing to do with the kernel views. They might
> > actually be merged in a different project, out of the kernel.
> >   
> 
> if patch to phandle, should we also patch driver to of_xxx_phandle()?

I don't understand your question. <&clk 1> is a phandle, you already
use phandles, it's just more precise than the word "entries".


Thanks,
Miquèl