Received: by 2002:a25:f815:0:0:0:0:0 with SMTP id u21csp3177897ybd; Fri, 28 Jun 2019 04:16:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqypK/Az4g2HknN2g4/orF5C6pt46xd75dqMglqJ9qcJ0Hb/nvzeaWx3zox4MmoAJBCr/22Q X-Received: by 2002:a63:6143:: with SMTP id v64mr8587678pgb.407.1561720590091; Fri, 28 Jun 2019 04:16:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561720590; cv=none; d=google.com; s=arc-20160816; b=UO0a5G86ZJr4sCm36EvqM3mjaVAiUQvcY+pxliVjMLoqmau2pB3AtCoa6938ODHiof pz4uDKzFVkZI4bzO1JL0kxWOryjPI/Ozlm0uAARxYBccrspQVaAg+1lHmMCeSmyVX2xD Dcs2aqqJBAweBdj0svPkUp0FTQQ+uS9CrB5O5UgJJGDYEncsfwy0a5g+wsZfUg5+tIPf IQXaf2LRw3MEAyoBUp2Fv131Ff4Tka0Er8T9CMSYWNdORX1z45Svwzj5UAaXWfNc2MHv 0IeldtRvGsmjGeVs22dEWdNwP3vagPJ8aTcdwI2jVzirDiLB0GOHf65VG1mJLryKo/bF NlDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=5omJ2kVT9Er2A44MdsX3k1LHEh118/+ekesFRQo798g=; b=oYX2P/Xl+bZhjgeRF6If17Lj9vfEq6QVqqYZxAfmb/06sWv6qlIJCisAqr6IoY08Vk vhqMKx5kwBcqTUTtvp+fkaYqNvHanwEXzLVUVWLjANUUM9zaDVdIoKvk8to1S17NsI5B 2IbGon5A9SLsRQ2x/9joL7mJN7hqO36C3BfiduHtwm5Fu6i8G1sHVwXH6IXNbpp9miqs eEuuif7rW0/vnxyN31UfPXqqRrMvhMOBTVwvPsXCaHDEOBNeHuoPLDWIZ3YMObXHeL/D GNpWdY1vvvOynEjpjHtZkz2+nPbnv+ik1187SSy02ICBZ6v/1rRQswgLjmGyjvGYkUst Uesg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j63si1785759pgc.185.2019.06.28.04.16.11; Fri, 28 Jun 2019 04:16:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726762AbfF1LQD (ORCPT + 99 others); Fri, 28 Jun 2019 07:16:03 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:7672 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726695AbfF1LQC (ORCPT ); Fri, 28 Jun 2019 07:16:02 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 1387CF0C2C2BFCEE44C6; Fri, 28 Jun 2019 19:16:01 +0800 (CST) Received: from linux-ibm.site (10.175.102.37) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Fri, 28 Jun 2019 19:15:50 +0800 From: Xiongfeng Wang To: , , CC: , , , , , , , , Subject: [PATCH RFC 2/3] arm64: mark all the GICC nodes in MADT as possible cpu Date: Fri, 28 Jun 2019 19:13:11 +0800 Message-ID: <1561720392-45907-3-git-send-email-wangxiongfeng2@huawei.com> X-Mailer: git-send-email 1.7.12.4 In-Reply-To: <1561720392-45907-1-git-send-email-wangxiongfeng2@huawei.com> References: <1561720392-45907-1-git-send-email-wangxiongfeng2@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.102.37] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We set 'cpu_possible_mask' based on the enabled GICC node in MADT. If the GICC node is disabled, we will skip initializing the kernel data structure for that CPU. To support CPU hotplug, we need to initialize some CPU related data structure in advance. This patch mark all the GICC nodes as possible CPU and only these enabled GICC nodes as present CPU. Signed-off-by: Xiongfeng Wang --- arch/arm64/kernel/setup.c | 2 +- arch/arm64/kernel/smp.c | 11 +++++------ 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index ec75d20..a82d0c2 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -391,7 +391,7 @@ static int __init topology_init(void) for_each_online_node(i) register_one_node(i); - for_each_possible_cpu(i) { + for_each_online_cpu(i) { struct cpu *cpu = &per_cpu(cpu_data.cpu, i); cpu->hotpluggable = 1; register_cpu(cpu, i); diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 7aa9471..854d32c 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -534,16 +534,14 @@ struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu) { u64 hwid = processor->arm_mpidr; - if (!(processor->flags & ACPI_MADT_ENABLED)) { - pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid); - return; - } - if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) { pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid); return; } + if (!(processor->flags & ACPI_MADT_ENABLED)) + pr_debug("disabled CPU entry with 0x%llx MPIDR\n", hwid); + if (is_mpidr_duplicate(cpu_count, hwid)) { pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid); return; @@ -764,7 +762,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus) if (err) continue; - set_cpu_present(cpu, true); + if ((cpu_madt_gicc[cpu].flags & ACPI_MADT_ENABLED)) + set_cpu_present(cpu, true); numa_store_cpu_info(cpu); } } -- 1.7.12.4