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[209.132.180.67]) by mx.google.com with ESMTP id v19si2906098pjn.96.2019.06.28.13.32.32; Fri, 28 Jun 2019 13:32:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=wLQq17Bv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727173AbfF1Uc3 (ORCPT + 99 others); Fri, 28 Jun 2019 16:32:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:54406 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727042AbfF1Uc2 (ORCPT ); Fri, 28 Jun 2019 16:32:28 -0400 Received: from mail-qk1-f171.google.com (mail-qk1-f171.google.com [209.85.222.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8960A214AF; Fri, 28 Jun 2019 20:32:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561753947; bh=nIIHPYVF/yLKT9Kd+T0+WBhtRttyLnFzsf/YfQlcS5I=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=wLQq17BvzxyNlq1t5I4duxVE2UpZL+u6VkeTC6m/6zhcoUjximdIIWTF4XSFIsNgP HNNma++/g3HknbooVG2pSr44CHsAAY8l0ade8kfv4ZVfjHezfp2y67DawPOsI+3aI5 CjRhl8Td1qVsKPxfmFlqf3mhFIKQmHAg3lUTOuJA= Received: by mail-qk1-f171.google.com with SMTP id g18so6034573qkl.3; Fri, 28 Jun 2019 13:32:27 -0700 (PDT) X-Gm-Message-State: APjAAAXtR/7svaxX0XxQm7hTxQm+3w7TiSggZ1MOvtMTBqbKJjvvpKVA PPbVHyxdwDrbriAZF2mpO/DomTUBXLxbtFGUfw== X-Received: by 2002:a37:a48e:: with SMTP id n136mr10667886qke.223.1561753946755; Fri, 28 Jun 2019 13:32:26 -0700 (PDT) MIME-Version: 1.0 References: <20190627000044.12739-1-robh@kernel.org> In-Reply-To: From: Rob Herring Date: Fri, 28 Jun 2019 14:32:15 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] dt-bindings: arm: Limit cpus schema to only check Arm 'cpu' nodes To: Paul Walmsley Cc: devicetree@vger.kernel.org, "linux-kernel@vger.kernel.org" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Lorenzo Pieralisi Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 26, 2019 at 7:02 PM Paul Walmsley wrote: > > On Wed, 26 Jun 2019, Rob Herring wrote: > > > Matching on the 'cpus' node was a bad choice because the schema is > > incorrectly applied to non-Arm cpus nodes. As we now have a common cpus > > schema which checks the general structure, it is also redundant to do so > > in the Arm CPU schema. > > > > The downside is one could conceivably mix different architecture's cpu > > nodes or have typos in the compatible string. The latter problem pretty > > much exists for every schema. > > The RISC-V patch applies cleanly, but this one doesn't apply here on > either master or next-20190626. Is there a different base commit? Ugg, sorry. I had another commit colliding with this in my tree. I've fixed it now and it's in my dt/next branch. Rob