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[209.132.180.67]) by mx.google.com with ESMTP id z197si3566684pgz.267.2019.06.28.20.48.53; Fri, 28 Jun 2019 20:49:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726795AbfF2Dsi (ORCPT + 99 others); Fri, 28 Jun 2019 23:48:38 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:8242 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726708AbfF2Dsi (ORCPT ); Fri, 28 Jun 2019 23:48:38 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id DDC885BA60F4CD73D81A; Sat, 29 Jun 2019 11:48:35 +0800 (CST) Received: from [127.0.0.1] (10.177.223.23) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.439.0; Sat, 29 Jun 2019 11:48:33 +0800 Subject: Re: [PATCH v8 3/7] cpu-topology: Move cpu topology code to common code. To: Atish Patra , CC: Jeffrey Hugo , Sudeep Holla , Will Deacon , Greg Kroah-Hartman , Albert Ou , Anup Patel , Catalin Marinas , "David S. Miller" , , Ingo Molnar , Johan Hovold , Linus Walleij , , Mark Rutland , Mauro Carvalho Chehab , Morten Rasmussen , Otto Sabart , Palmer Dabbelt , Paul Walmsley , "Peter Zijlstra (Intel)" , "Rafael J. Wysocki" , Rob Herring , Thomas Gleixner , Will Deacon , , Russell King References: <20190627195302.28300-1-atish.patra@wdc.com> <20190627195302.28300-4-atish.patra@wdc.com> From: Hanjun Guo Message-ID: <5bcd9594-b2c1-7706-aabb-154198019b29@huawei.com> Date: Sat, 29 Jun 2019 11:48:18 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20190627195302.28300-4-atish.patra@wdc.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.223.23] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2019/6/28 3:52, Atish Patra wrote: > Both RISC-V & ARM64 are using cpu-map device tree to describe > their cpu topology. It's better to move the relevant code to > a common place instead of duplicate code. > > To: Will Deacon > To: Catalin Marinas Using Cc: is better. > Signed-off-by: Atish Patra > [Tested on QDF2400] > Tested-by: Jeffrey Hugo > [Tested on Juno and other embedded platforms.] > Tested-by: Sudeep Holla > Reviewed-by: Sudeep Holla > Acked-by: Will Deacon > Acked-by: Greg Kroah-Hartman > --- > arch/arm64/include/asm/topology.h | 23 --- > arch/arm64/kernel/topology.c | 303 +----------------------------- > drivers/base/arch_topology.c | 296 +++++++++++++++++++++++++++++ > include/linux/arch_topology.h | 28 +++ > include/linux/topology.h | 1 + > 5 files changed, 329 insertions(+), 322 deletions(-) Tested on Kunpeng920 ARM64 server, works good, # lscpu Architecture: aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s): 4 Vendor ID: 0x48 Model: 0 Stepping: 0x1 CPU max MHz: 2600.0000 CPU min MHz: 260.0000 BogoMIPS: 200.00 L1d cache: 64K L1i cache: 64K L2 cache: 512K L3 cache: 32768K NUMA node0 CPU(s): 0-23 NUMA node1 CPU(s): 24-47 NUMA node2 CPU(s): 48-71 NUMA node3 CPU(s): 72-95 Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma dcpop asimddp asimdfhm Tested-by: Hanjun Guo For the ACPI code, Acked-by: Hanjun Guo Thanks Hanjun