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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Sat, 29 Jun 2019 17:55:33 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x5TGtWhI13829102 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sat, 29 Jun 2019 16:55:32 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8D569B2064; Sat, 29 Jun 2019 16:55:32 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6BD34B205F; Sat, 29 Jun 2019 16:55:32 +0000 (GMT) Received: from paulmck-ThinkPad-W541 (unknown [9.85.128.230]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Sat, 29 Jun 2019 16:55:32 +0000 (GMT) Received: by paulmck-ThinkPad-W541 (Postfix, from userid 1000) id 1FBCB16C2E92; Sat, 29 Jun 2019 09:55:33 -0700 (PDT) Date: Sat, 29 Jun 2019 09:55:33 -0700 From: "Paul E. McKenney" To: Andrea Parri Cc: Steven Rostedt , Byungchul Park , Scott Wood , Joel Fernandes , Sebastian Andrzej Siewior , rcu , LKML , Thomas Gleixner , Ingo Molnar , Peter Zijlstra , Josh Triplett , Mathieu Desnoyers , Lai Jiangshan Subject: Re: [RFC] Deadlock via recursive wakeup via RCU with threadirqs Reply-To: paulmck@linux.ibm.com References: <20190627173831.GW26519@linux.ibm.com> <20190627181638.GA209455@google.com> <20190627184107.GA26519@linux.ibm.com> <13761fee4b71cc004ad0d6709875ce917ff28fce.camel@redhat.com> <20190627203612.GD26519@linux.ibm.com> <20190628073138.GB13650@X58A-UD3R> <20190628104045.GA8394@X58A-UD3R> <20190628114411.5d9ab351@gandalf.local.home> <20190629151236.GA7862@andrea> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190629151236.GA7862@andrea> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 x-cbid: 19062916-0060-0000-0000-0000035712CE X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011352; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000286; SDB=6.01225030; UDB=6.00644811; IPR=6.01006231; MB=3.00027525; MTD=3.00000008; XFM=3.00000015; UTC=2019-06-29 16:55:37 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19062916-0061-0000-0000-000049F3F06F Message-Id: <20190629165533.GA3112@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-06-29_12:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1906290209 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jun 29, 2019 at 05:12:36PM +0200, Andrea Parri wrote: > Hi Steve, > > > As Paul stated, interrupts are synchronization points. Archs can only > > play games with ordering when dealing with entities outside the CPU > > (devices and other CPUs). But if you have assembly that has two stores, > > and an interrupt comes in, the arch must guarantee that the stores are > > done in that order as the interrupt sees it. > > Hopefully I'm not derailing the conversation too much with my questions > ... but I was wondering if we had any documentation (or inline comments) > elaborating on this "interrupts are synchronization points"? I don't know of any, but I would suggest instead looking at something like the Hennessey and Patterson computer-architecture textbook. Please keep in mind that the rather detailed documentation on RCU is a bit of an outlier due to the fact that there are not so many textbooks that cover RCU. If we tried to replicate all of the relevant textbooks in the Documentation directory, it would be quite a large mess. ;-) Thanx, Paul