Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp1890080ybi; Mon, 1 Jul 2019 02:14:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqyn+dwqTTzP1thJY+GDS9BlY2YxcCyyJllriFsRqTXLjKoYyOfAdklynq5OAgFCnkZ/qtIX X-Received: by 2002:a17:902:61:: with SMTP id 88mr26546814pla.50.1561972468674; Mon, 01 Jul 2019 02:14:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561972468; cv=none; d=google.com; s=arc-20160816; b=HfaQFzITzix0DuuPFTHeqT0qudRCcxYnXNOg0mO4129bwtud4idg4cB7+/etADMSDL v/IG2cHO8H85bQXeEaGkrZtbrtdQHU7DhYMYK7w682hvZEX/eA2A6+XUWZTVQsX+gNlm HFpdbEP138zyvZRe5oLZOXSmCXT7FzBdwMwPDIDWUtM1Zn7AYLLukpbpJKQ7AcAG6bvC h6TVcpIpTtOWM1uMWRvdS3mjN51xb5gBpy/bImC9THugxzxCtm/V5uyp/GjlohTiR33N 4rLwRgN3mFWFFtR83WcJhF9FRjtuoNOayj+BVM/tinQHgtMz1hm0jLNs0Jqii+jAqB+h ZuJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DvHtShj7KGwLsgDeVESsbeeuJPQVX1FTxQG4otfV4tc=; b=shjjfk16Pc5ofL1feiIoUtWENi4TudIXmb32Qh52kkQGl+JBMOQAdoyRbrc/+m9XvM dX5+zyBwRD2eDB95ge6rDzIeCsjhHneBCoMJ9VUs89ZcRTWL6UjGdZhpZmQfL1fK2whN uiP4POL5xS9HO4VpqsE15LF9N2Txoo1u+/nvmccpRqz6TauQ6iJYrzTllBSDz6wTv/uz p1mqV/1rChu/ohr3EhxCqfH81SIt0OLnII/PKmoV/x93XveJ708a1tDGHL3mN7s+XzHI PkcleW0oUFvr5oqZt6uPoiJg0y7+5nig12J9xlRFADaKyC6YNr8mtu0DwUUJNNoav8uR 9knA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=NzFd4yDO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x7si10450857pfi.257.2019.07.01.02.14.13; Mon, 01 Jul 2019 02:14:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=NzFd4yDO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728518AbfGAJNw (ORCPT + 99 others); Mon, 1 Jul 2019 05:13:52 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:40810 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728437AbfGAJN0 (ORCPT ); Mon, 1 Jul 2019 05:13:26 -0400 Received: by mail-wr1-f65.google.com with SMTP id p11so12918089wre.7 for ; Mon, 01 Jul 2019 02:13:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DvHtShj7KGwLsgDeVESsbeeuJPQVX1FTxQG4otfV4tc=; b=NzFd4yDO4l1vl0XdKs7v6lF+CqKqVcDpmpXK07uA9L2eqCtCNSeW67wkwWZZF3BC3i Z0543VnlYfSUwlgcoidkXwW3ka36MPS/qxj9AgOccpCZcJtzaM45qUNpZ+bISGcHzO9P 8qW3kTvDFfB1vozhMFIepXr+g5NMuqVaVQdXVTlC9esermcZoG6FUtzoM0gMpTPslM2C yqWD3PiU+htIceVIiqtWFArZ+blrDkyfPdfbTi8YTPt3vJritJ4Xbj2iCLUFG05cQule F3WvMdxaLOR4S0OM5xNBAkZiP8GKHZkq4FAu8/XxBX8bKfk/25zO/q2mCBwlPFVEWs9W +3/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DvHtShj7KGwLsgDeVESsbeeuJPQVX1FTxQG4otfV4tc=; b=EXAHxON124Cst80Qtw+iIp1RlO07WdbGTId2b3HgXom3PWh9fQun+ESu94wrXQ4z0E FnCvryB/ydLUPS9F39tR77/G48WzXRiKzbGo4lO3oH6LZyt0SvJgngsz+ffOTpFXmTIl 8iFOtWVY5ISEhbud0Ip4BjmXCybB1uxaFYvgDkRolfj59i7+B1z0fL0w12+0rTLffh+0 +xfW7d0t8ym+cYJmZ+HTS8Zcjjr654VTbN4cWoUGjMdwTfgc+a+vqwArSH+k/7D9QdDH 3C/bqQHC+yddgamWb5jPpvDqZ9QLw1EmV91HFwmYeNfD89dfHOx6tYqQDU0s0iGMSBaF vxdg== X-Gm-Message-State: APjAAAUk2LAYggyGb6m/+A3PiwsKy5rnGMR5ArHAESFkkfHZjo28fTvS 4GZwoKcSjoIaaOO7KQ/R0oq7vTkjdgk= X-Received: by 2002:a5d:540e:: with SMTP id g14mr19552183wrv.346.1561972404503; Mon, 01 Jul 2019 02:13:24 -0700 (PDT) Received: from localhost.localdomain (176-150-251-154.abo.bbox.fr. [176.150.251.154]) by smtp.gmail.com with ESMTPSA id i16sm6305659wrm.37.2019.07.01.02.13.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 01 Jul 2019 02:13:23 -0700 (PDT) From: Neil Armstrong To: jbrunet@baylibre.com, khilman@baylibre.com Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, martin.blumenstingl@googlemail.com, linux-gpio@vger.kernel.org, Neil Armstrong Subject: [RFC/RFT v3 13/14] arm64: dts: meson-g12b: add cpus OPP tables Date: Mon, 1 Jul 2019 11:12:57 +0200 Message-Id: <20190701091258.3870-14-narmstrong@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701091258.3870-1-narmstrong@baylibre.com> References: <20190701091258.3870-1-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the OPP table taken from the HardKernel Odroid-N2 DTS. The Amlogic G12B SoC seems to available in 2 types : - low-speed: Cortex-A73 Cluster up to 1,704GHz - high-speed: Cortex-A73 Cluster up to 2.208GHz The Cortex-A73 Cluster can be clocked up to 1,896GHz for both types. The Vendor Amlogic A311D OPP table are slighly different, with lower voltages than the HardKernel S922X tables but seems to be high-speed type. This adds the conservative OPP table with the S922X higher voltages and the maximum low-speed OPP frequency. The values were tested to be stable on an HardKernel Odroid-N2 board running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations for both clusters and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 115 ++++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi index d5edbc1a1991..98ae8a7c8b41 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi @@ -95,6 +95,121 @@ compatible = "cache"; }; }; + + cpu_opp_table_0: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <731000>; + }; + + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <731000>; + }; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <731000>; + }; + + opp-666666666 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <731000>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <731000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <731000>; + }; + + opp-1398000000 { + opp-hz = /bits/ 64 <1398000000>; + opp-microvolt = <761000>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <791000>; + }; + + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <831000>; + }; + + opp-1704000000 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <861000>; + }; + + opp-1896000000 { + opp-hz = /bits/ 64 <1896000000>; + opp-microvolt = <981000>; + }; + }; + + cpub_opp_table_1: opp-table-1 { + compatible = "operating-points-v2"; + opp-shared; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <751000>; + }; + + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <751000>; + }; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <751000>; + }; + + opp-666666666 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <751000>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <751000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <771000>; + }; + + opp-1398000000 { + opp-hz = /bits/ 64 <1398000000>; + opp-microvolt = <791000>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <821000>; + }; + + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <861000>; + }; + + opp-1704000000 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <891000>; + }; + }; }; &clkc { -- 2.21.0