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[209.132.180.67]) by mx.google.com with ESMTP id e3si10676481pfa.248.2019.07.01.04.29.55; Mon, 01 Jul 2019 04:30:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728490AbfGAKFC convert rfc822-to-8bit (ORCPT + 99 others); Mon, 1 Jul 2019 06:05:02 -0400 Received: from relay6-d.mail.gandi.net ([217.70.183.198]:39969 "EHLO relay6-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726967AbfGAKFC (ORCPT ); Mon, 1 Jul 2019 06:05:02 -0400 X-Originating-IP: 86.250.200.211 Received: from xps13 (lfbn-1-17395-211.w86-250.abo.wanadoo.fr [86.250.200.211]) (Authenticated sender: miquel.raynal@bootlin.com) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id 4E933C0009; Mon, 1 Jul 2019 10:04:55 +0000 (UTC) Date: Mon, 1 Jul 2019 12:04:54 +0200 From: Miquel Raynal To: Piotr Sroka Cc: , Boris Brezillon , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Paul Burton , "Geert Uytterhoeven" , Arnd Bergmann , "Marcel Ziswiler" , Dmitry Osipenko , Stefan Agner , Subject: Re: [PATCH v2 1/2] mtd: nand: Add Cadence NAND controller driver Message-ID: <20190701120454.6c8ac48e@xps13> In-Reply-To: <20190701095143.GA21903@global.cadence.com> References: <20190219161406.4340-1-piotrs@cadence.com> <20190219161823.22466-1-piotrs@cadence.com> <20190305190954.6c38d681@xps13> <20190321093356.GA19577@global.cadence.com> <20190512142426.11453a6c@xps13> <20190606151948.GA10565@global.cadence.com> <20190627181542.131aa061@xps13> <20190701095143.GA21903@global.cadence.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.1 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Piotr, Piotr Sroka wrote on Mon, 1 Jul 2019 10:51:45 +0100: [...] > >> >> > > >> >> >This driver is way too massive, I am pretty sure it can shrink a > >> >> >little bit more. > >> >> >[...] > >> >> > > >> >> I will try to make it shorer but it will be difucult to achive. It is because - there are a lot of calculation needed for PHY - ECC are interleaved with data (like on marvell-nand or gpmi-nand). > >> >> Therefore: + RAW mode is complicated + protecting BBM increases number of lines of source code > >> >> - need to support two DMA engines internal and external (slave) We will see on next patch version what is the result. That page layout looks: > >> > > >> >Maybe you don't need to support both internal and external DMA? > >> > > >> >I am pretty sure there are rooms for size reduction. > >> > >> I describe how it works in general and maybe you help me chose better solution. > >> > >> HW controller can work in 3 modes. PIO - can work in master or slave DMA > >> CDMA - needs Master DMA for accessing command descriptors. > >> Generic mode - can use only Slave DMA. > >> > >> Generic mode is neccessery to implement functions other than page > >> program, page read, block erase. So it is essential. I cannot avoid > >> to use Slave DMA. > > > >This deserves a nice comment at the top. > Ok I will add the modes description to cover letter. > Not only to the cover letter: People read the code. Interested people might also read the commit log which is quite easy to find. The cover letter however will just disappear in the history of the Internet. I would rather prefer you explain how the IP works at the top of the driver. Thanks, Miquèl