From: "Ray Bryant" <raybry@mpdtxmail.amd.com>
To: "Andi Kleen" <ak@suse.de>
Subject: Re: Enabling RDPMC in user space by default
Date: Tue, 29 Nov 2005 10:56:31 -0600
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On Tuesday 29 November 2005 09:15, Andi Kleen wrote:
> Hallo,
>
> I'm considering to enable CR4.PCE by default on x86-64/i386. Currently it's
> 0 which means RDPMC doesn't work. On x86-64 PMC 0 is always programmed to
> be a cycle counter, so it would be useful to be able to access
> this for measuring instructions. That's especially useful because RDTSC
> does not necessarily count cycles in the current P state (already
> the case on Intel CPUs and AMD's future direction seems to also
> to decouple it from cycles) Drawback is that it stops during idle, but
> that shouldn't be a big issue for normal measuring. It's not useful
> as a real timer anyways.
>
> On Pentium 4 it also has the advantage that unlike RDTSC it's not
> serializing so should be much faster.
>
> The kernel change would be to always set CR4.PCE to allow RDPMC
> in ring 3.
>

You might also ping Stephane Eranian and the folks that are working on 
defining a common performance measurement interface in the kernel
over on  perfctr-devel@lists.sourceforge.net and see what they think.
I'll cc them on this reply.

> It would be actually a good idea to disable RDTSC in ring 3 too
> (because user space usually doesn't have enough information to make
> good use of it and gets it wrong), but I fear that will break
> too many applications right now.
>

FWIW, I agree here.   We lock down the power state and still use RDTSC for 
some timing things.

> Any comments on this?
>
> -Andi
>
> -
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-- 
Ray Bryant
AMD Performance Labs                   Austin, Tx
512-602-0038 (o)                 512-507-7807 (c)

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