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In-Reply-To: <alpine.DEB.2.21.1907020837020.1802@nanos.tec.linutronix.de>
From:   Wanpeng Li <kernellwp@gmail.com>
Date:   Tue, 2 Jul 2019 17:44:00 +0800
Message-ID: <CANRm+CwttRaBUgL=OO0MkziD+qkj2GEXaDZfAZ9ZHAcC736kLA@mail.gmail.com>
Subject: Re: [BUG] kvm: APIC emulation problem - was Re: [LKP] [x86/hotplug] ...
To:     Thomas Gleixner <tglx@linutronix.de>
Cc:     Rong Chen <rong.a.chen@intel.com>, Feng Tang <feng.tang@intel.com>,
        "the arch/x86 maintainers" <x86@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        "H. Peter Anvin" <hpa@zytor.com>,
        "tipbuild@zytor.com" <tipbuild@zytor.com>,
        "lkp@01.org" <lkp@01.org>, Ingo Molnar <mingo@kernel.org>,
        kvm <kvm@vger.kernel.org>, Paolo Bonzini <pbonzini@redhat.com>,
        =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= <rkrcmar@redhat.com>,
        Fenghua Yu <fenghua.yu@intel.com>
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On Tue, 2 Jul 2019 at 14:40, Thomas Gleixner <tglx@linutronix.de> wrote:
>
> Wanpeng,
>
> On Tue, 2 Jul 2019, Wanpeng Li wrote:
> > On Tue, 2 Jul 2019 at 06:44, Thomas Gleixner <tglx@linutronix.de> wrote:
> > >
> > > While that CPU0 hotplug test case is surely an esoteric issue, the APIC
> > > emulation is still wrong, Even if the play_dead() code would not enable
> > > interrupts then the pending IRR bit would turn into an ISR .. interrupt
> > > when the APIC is reenabled on startup.
> >
> > >From SDM 10.4.7.2 Local APIC State After It Has Been Software Disabled
> > * Pending interrupts in the IRR and ISR registers are held and require
> > masking or handling by the CPU.
>
> Correct.
>
> > In your testing, hardware cpu will not respect soft disable APIC when
> > IRR has already been set or APICv posted-interrupt is in flight, so we
> > can skip soft disable APIC checking when clearing IRR and set ISR,
> > continue to respect soft disable APIC when attempting to set IRR.
> > Could you try below fix?
>
> > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> > index 05d8934..f857a12 100644
> > --- a/arch/x86/kvm/lapic.c
> > +++ b/arch/x86/kvm/lapic.c
> > @@ -2376,7 +2376,7 @@ int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu)
> >      struct kvm_lapic *apic = vcpu->arch.apic;
> >      u32 ppr;
> >
> > -    if (!apic_enabled(apic))
> > +    if (!kvm_apic_hw_enabled(apic))
> >          return -1;
> >
> >      __apic_update_ppr(apic, &ppr);
>
> Yes. That fixes it and works as expected. Thanks for the quick resolution.

No problem. :)

> I surely stared at that function, but was not sure how to fix
> it proper.
>
> Tested-by: Thomas Gleixner <tglx@linutronix.de>
>
> Please add a Cc: stable... tag when you post the patch.

Ok.

Regards,
Wanpeng Li