Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp3288024ybi; Tue, 2 Jul 2019 05:23:42 -0700 (PDT) X-Google-Smtp-Source: APXvYqzVqmhSBeO6ENDADG6YsL0G6eK0+8tEIkKcuV0fcikno15IfwnWdWEllFKdYBPWweDQndvS X-Received: by 2002:a17:90a:1d8:: with SMTP id 24mr5430009pjd.70.1562070222005; Tue, 02 Jul 2019 05:23:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562070221; cv=none; d=google.com; s=arc-20160816; b=s2+9XEOtMJwFkmZ1BJdmMk/VURyJwa4BYXhZINPYV8j6C37wdqm4xBek2kIBvb3RVW 0B0uu7hSBY2wzlJDkY1OnMEd4FM5PxgJOlG4DmOSEoAi+8lja9h2AwnTqSKBSKFJ4ew2 SxvXkXrHyNdviqvk+M//LfI8zGLmN/fyJfx3jaetPtf6Ke38CGdcs9xQM4shcKJRYJD5 oei8VUFXmlRNKERq4YMq+8Lm6s5f06s4tuXj98lw0AUaochCPhlLFG21X6xlemnC7OVP eZKLp6QYxvEoW6Y4Idnf9AxzXyh59QCGZPDFLtiLKthb8OSUbrTUdytmqGaO4JJJc8ii SDog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:in-reply-to :mime-version:user-agent:date:message-id:from:cc:references:to :subject; bh=k058Q/DTmXPl+VZydyHCFeBonEmqtbe2qFq6D6PKJiQ=; b=O9WU9p3J0m+yXF3GzW/2k6m4kerC9tyPh+owFvAbD+LmCPmZElAWWT207j7Qb2vSrC aC4TBJk0cuTlT/hlg7pPEEtbFOiFlxjniK0wkQVF3QaHeZURML7LE2IUqUhRCHdbnaQQ VVX5fpyTt1mbzXeKlNpVn0jK+Q1n2UD8y/ftWhI3vwn5ftOL5BqAQS1qWA+E0k5FKV+z lnE4Vk6AO3xnJ4FXOodlOFq/0qqBHFzhznj4Cp0BiK14+lYAQXlA+GYbwWRP5Vk8zzNv ubPeOpOwwmL6Ui6n2XckdMF22RPr3X7659MgUC7lMaXB2hFM+GBlatIwVnLWDQLA0j4i JC6w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a25si14137668pfk.201.2019.07.02.05.23.26; Tue, 02 Jul 2019 05:23:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726627AbfGBMWu (ORCPT + 99 others); Tue, 2 Jul 2019 08:22:50 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:7687 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726341AbfGBMWu (ORCPT ); Tue, 2 Jul 2019 08:22:50 -0400 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id AC745EE7D815FCDD5B0E; Tue, 2 Jul 2019 20:22:46 +0800 (CST) Received: from [127.0.0.1] (10.74.221.148) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.439.0; Tue, 2 Jul 2019 20:22:41 +0800 Subject: Re: linux-next: Tree for Jul 2 To: Will Deacon , References: <20190702195158.79aa5517@canb.auug.org.au> <000f56ac-2abc-bc6a-e2db-5ae38779d276@hisilicon.com> <20190702120321.v3224ofd4aaxvytk@willie-the-truck> CC: Stephen Rothwell , Linux Next Mailing List , Linux Kernel Mailing List From: Zhangshaokun Message-ID: <8a3bea20-fe65-35ea-43f1-d8f085a097e2@hisilicon.com> Date: Tue, 2 Jul 2019 20:22:41 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.1.1 MIME-Version: 1.0 In-Reply-To: <20190702120321.v3224ofd4aaxvytk@willie-the-truck> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.74.221.148] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Will, On 2019/7/2 20:03, Will Deacon wrote: > [+Joerg] > > On Tue, Jul 02, 2019 at 06:40:45PM +0800, Zhangshaokun wrote: >> +Cc: Will Deacon >> >> There is a compiler failure on arm64 platform, as follow: >> In file included from ./include/linux/list.h:9:0, >> from ./include/linux/kobject.h:19, >> from ./include/linux/of.h:17, >> from ./include/linux/irqdomain.h:35, >> from ./include/linux/acpi.h:13, >> from drivers/iommu/arm-smmu-v3.c:12: >> drivers/iommu/arm-smmu-v3.c: In function ‘arm_smmu_device_hw_probe’: >> drivers/iommu/arm-smmu-v3.c:194:40: error: ‘CONFIG_CMA_ALIGNMENT’ undeclared (first use in this function) >> #define Q_MAX_SZ_SHIFT (PAGE_SHIFT + CONFIG_CMA_ALIGNMENT) >> ^ >> It's the commit ("iommu/arm-smmu-v3: Increase maximum size of queues") > > Thanks for the report. I've provided a fix below. > It works, thanks for the patch, Tested-by: Shaokun Zhang Thanks, Shaokun > Joerg -- please can you take this on top of the SMMUv3 patches queued > for 5.3? > > Cheers, > > Will > > --->8 > >>From e8f9d8229e3aaa4817bfb72752e804eec97a3d8d Mon Sep 17 00:00:00 2001 > From: Will Deacon > Date: Tue, 2 Jul 2019 12:53:18 +0100 > Subject: [PATCH] iommu/arm-smmu-v3: Fix compilation when CONFIG_CMA=n > MIME-Version: 1.0 > Content-Type: text/plain; charset=UTF-8 > Content-Transfer-Encoding: 8bit > > When compiling a kernel without support for CMA, CONFIG_CMA_ALIGNMENT > is not defined which results in the following build failure: > > In file included from ./include/linux/list.h:9:0 > from ./include/linux/kobject.h:19, > from ./include/linux/of.h:17 > from ./include/linux/irqdomain.h:35, > from ./include/linux/acpi.h:13, > from drivers/iommu/arm-smmu-v3.c:12: > drivers/iommu/arm-smmu-v3.c: In function ‘arm_smmu_device_hw_probe’: > drivers/iommu/arm-smmu-v3.c:194:40: error: ‘CONFIG_CMA_ALIGNMENT’ undeclared (first use in this function) > #define Q_MAX_SZ_SHIFT (PAGE_SHIFT + CONFIG_CMA_ALIGNMENT) > > Fix the breakage by capping the maximum queue size based on MAX_ORDER > when CMA is not enabled. > > Reported-by: Zhangshaokun > Signed-off-by: Will Deacon > --- > drivers/iommu/arm-smmu-v3.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > index 57fb4e080d6b..8e73a7615bf5 100644 > --- a/drivers/iommu/arm-smmu-v3.c > +++ b/drivers/iommu/arm-smmu-v3.c > @@ -191,7 +191,13 @@ > #define Q_BASE_RWA (1UL << 62) > #define Q_BASE_ADDR_MASK GENMASK_ULL(51, 5) > #define Q_BASE_LOG2SIZE GENMASK(4, 0) > + > +/* Ensure DMA allocations are naturally aligned */ > +#ifdef CONFIG_CMA_ALIGNMENT > #define Q_MAX_SZ_SHIFT (PAGE_SHIFT + CONFIG_CMA_ALIGNMENT) > +#else > +#define Q_MAX_SZ_SHIFT (PAGE_SHIFT + MAX_ORDER - 1) > +#endif > > /* > * Stream table. >