Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp3362210ybi; Tue, 2 Jul 2019 06:34:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqxeiFENlZzirmv5Z0cnoFjwCFD+9Mo3dSo7mOWcbQZw3k3iM3P4vDqA6onvdlAAuNO0AWii X-Received: by 2002:a17:90a:b00b:: with SMTP id x11mr5758429pjq.120.1562074483162; Tue, 02 Jul 2019 06:34:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562074483; cv=none; d=google.com; s=arc-20160816; b=wdoYH2bXzpZAJCwkxCosRnQFDNoJzfgLtMh+4k40f8PrB4FzW0prAimTNvYwi3kxpk jZh00f5Kfoh85AnMOTbkaRCR85KbZb3U6HDv816dmmUFfZs0lRo4M8R+POMb69LPOXBp h+JPyW+RlFRUHJ/26Gs4me/zdRRVCHK6E5DFpmJlpi6GzvzTUripPfH+83tLZV+6Kgkn vXzrREa018QJelz6QZTriURcZPjZYDkwaKKS43wkrXKl36//Zg1VY1VrkFWostbKN6Cg QjXxhEjUlXfM+uP0cjHsJoq3zG43tQZwWutlx6wi5GUHdWgR6hTHeZ7fllqLz1QaC+x2 6I+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=w0OYaXyIMcAAJ4gBJEOEXLofDRzjGVAncXahqHJtr3g=; b=iB9JL40KPrR3yNMf/FUs41FTYQnraLD5tfq9KKnoOLNUw7UMspb4T13CN30alEJhy+ F18EnWsbNt4Zx8oIcUSpePkRKrHshD62EMhfjdEsZqfU+0T5OZ3/HEZ5VzaSJCSyodar 7OuQNiHbSkjVjyz+u6f4NFLNtj2jS5iGj3b4ASenmvlzstKvkrIQ1RTLU5BbVmsIRTuz SFhBmwMGgINUHSIQiBUVwrSVnBzg9QC7gaSDqApAhMS9AKYScFKL13eJ4mnbSd2tHGIn PhnLwXlTarxUXF5mb/f41eBgrDdHIh4tOgBtVJgYGwGmkLWFVQRwWKV8updwdeqoX3xE 78Kg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=jZmsk2ap; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k16si12931578pfi.174.2019.07.02.06.34.28; Tue, 02 Jul 2019 06:34:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=jZmsk2ap; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726951AbfGBNdU (ORCPT + 99 others); Tue, 2 Jul 2019 09:33:20 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:40894 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726375AbfGBNdT (ORCPT ); Tue, 2 Jul 2019 09:33:19 -0400 Received: by mail-wr1-f66.google.com with SMTP id p11so17866152wre.7; Tue, 02 Jul 2019 06:33:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=w0OYaXyIMcAAJ4gBJEOEXLofDRzjGVAncXahqHJtr3g=; b=jZmsk2apK9wWaC1Jwi8eJ+VpNeeqK9vyCI2z4YLKZy0UMQiklfvEJVTrYVsIE1tAoL Y0mxMn9PXmVbH/NBkukGPC7y0H/BBRFTvNqfGcb6L2DEcT68IJb+Tno6Sy2dbcfXF35q EYTpbUzAwTBib2rn38pMmYI7wgZXsOBsHf7d12NDK5rlNm1mLqrrvfLa0bpKw++S3JJW nmGOJnDN4flQWKyQ2INLpigpyMPRSa9KHhhIMB3wFazz2VGW/XO6KJlsgowT23b+pR+w +XCGBbRduRTbvzTTfwVMn2bBa69lj94fYKOEH8G7r345mzWJr0kHUuhILLc9d0GFZdHN ZeFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=w0OYaXyIMcAAJ4gBJEOEXLofDRzjGVAncXahqHJtr3g=; b=l8esMl3Vl5/RvA0eFg4q2t5xYbfFBtcGPce3pWDJRrKLfaZN2Aqgo4Qn/Aitk169Ep UWP7WzX94QdZ/3sP4hGx7VdmNzMZyxze8RP+gWVGfPygV1mmlqFhOI5E6p0cumqWhEM+ 8+tRIDPMcKlvw9TMkL1rKWsSgOeChvuoGdWKTLHVA/4JYToKEdJ/2C+j7EUCWtGqlX92 nd4pmyT2HYLdTx0ng5B5PdcQc51C+nn05+pVX5h3wEny7KKBq+3Q7IrqFDpatnd8Yoyn sK5DbWOuj9FYTzcA5nou9SPmTe2Cn7nx1rmt1GCXA7MH4ZcsBXRLY8T02e2zGQgSl5O4 MTIA== X-Gm-Message-State: APjAAAW8kGU4rknYTk8BAKGMsQtQ350RD4aq+9YccifXwMotnU+5WxxX cVamGFzRXPqEeG+B87edpRoMjx65tgQMD8fl1os= X-Received: by 2002:adf:db12:: with SMTP id s18mr23027525wri.335.1562074397596; Tue, 02 Jul 2019 06:33:17 -0700 (PDT) MIME-Version: 1.0 References: <1561469191-26840-1-git-send-email-abel.vesa@nxp.com> <20190702132647.3kyfl5gx6ghdiizl@fsr-ub1664-175> In-Reply-To: <20190702132647.3kyfl5gx6ghdiizl@fsr-ub1664-175> From: Daniel Baluta Date: Tue, 2 Jul 2019 16:33:06 +0300 Message-ID: Subject: Re: [PATCH] arm64: dts: imx8mm: Init rates and parents configs for clocks To: Abel Vesa Cc: Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , dl-linux-imx , Lucas Stach , Devicetree List , linux-arm-kernel , Linux Kernel Mailing List , Daniel Baluta Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 2, 2019 at 4:26 PM Abel Vesa wrote: > > On 19-06-26 15:45:15, Daniel Baluta wrote: > > On Tue, Jun 25, 2019 at 4:42 PM Abel Vesa wrote: > > > > > > Add the initial configuration for clocks that need default parent and rate > > > setting. This is based on the vendor tree clock provider parents and rates > > > configuration except this is doing the setup in dts rather than using clock > > > consumer API in a clock provider driver. > > > > > > Signed-off-by: Abel Vesa > > > --- > > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 36 +++++++++++++++++++++++++++++++ > > > 1 file changed, 36 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > > > index 232a741..ab92108 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > > > @@ -451,6 +451,42 @@ > > > <&clk_ext3>, <&clk_ext4>; > > > clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", > > > "clk_ext3", "clk_ext4"; > > > + assigned-clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, > > > + <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>, > > > + <&clk IMX8MM_SYS_PLL3>, > > > + <&clk IMX8MM_VIDEO_PLL1>, > > > + <&clk IMX8MM_CLK_NOC>, > > > + <&clk IMX8MM_CLK_PCIE1_CTRL>, > > > + <&clk IMX8MM_CLK_PCIE1_PHY>, > > > + <&clk IMX8MM_CLK_CSI1_CORE>, > > > + <&clk IMX8MM_CLK_CSI1_PHY_REF>, > > > + <&clk IMX8MM_CLK_CSI1_ESC>, > > > + <&clk IMX8MM_CLK_DISP_AXI>, > > > + <&clk IMX8MM_CLK_DISP_APB>; > > > + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>, > > > + <0>, > > Isn't there a macro for 0? (dummy clock?) > > I don't know about any such macro. If you're referring to IMX8MM_CLK_DUMMY, > that can't be used here since all I want here is to skip setting a parent to > the IMX8MM_CLK_IPG_AUDIO_ROOT. If I use IMX8MM_CLK_DUMMY (along with &clk) > it will set the parent to IMX8MM_CLK_DUMMY and that's not what's needed here. > > This is in accordance to the documentation: > > Documentation/devicetree/bindings/clock/clock-bindings.txt: > > "To skip setting parent or rate of a clock its corresponding entry should be > set to 0, or can be omitted if it is not followed by any non-zero entry." You are right. Thanks for the explanation!