Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp816227ybi; Wed, 3 Jul 2019 05:11:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqzXBXHRm139dmWOAvxwhOLYzucu8EBwxViZvowCagEVxJY1gzIxIQqBBatjElf3xeY6gybX X-Received: by 2002:a17:902:d916:: with SMTP id c22mr42772847plz.195.1562155862922; Wed, 03 Jul 2019 05:11:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562155862; cv=none; d=google.com; s=arc-20160816; b=dJvXCPySEri+JulQlEvBhGW4oX+1QnDENm9YTEm2/mBIg7t71RoRUhWK4zjmfkbmym cMw7iin/Ba3ETXSGqG1+ciAxYE5vs+DbfrxJqKGYxS9dphKJi9x1LlQiiT/XqRmrbwqJ k9cfHM5eHppQfT8Z+bg0e8D/keOCQ1SJjOmgj6l32lMfuDy2aCw6+IQncBdh+87t1NA5 BLwS46p+56MaRtebcUiL/FPpLlz1XEN6aINmjmPzIUP2jI3SLpEaQ2hZTBSuwnP+6X3D qkof7ifhfFWsJ8SvsTSQvWZBkurapo0GVGTc1P77TIgBywgSqcBLwkvxSyIVC43MKqVo YnRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=6QnViHdKng7UGpRIDBspXfiPOcW+1M04mrXLgK9uqrk=; b=UNoNrh9QMEz8TmFdmPwQYn1xaWSQjOUhnAfSLIEd2Wn2MbJsIcmJ7pv5S5z3WNqTc1 9ZIt+IPJvqlNqOdJzMe176rFDXkxnpiJtAG87K+vca2DRe16CScvyAYDbO68/cxuNNTw SjVH6b/nGcy4pUw07SvrDL1+QjVNaQ7AjpEhLyvzT5nrEccz0HBYgchwfjylUPHvR4l0 jR9U4BcbZFmnaDeI6hs6nDd6c/siJMybdhw4D2l5zPYmXqUlwzAZi8uAW1+1TFdArg5f j4Tc2UUWg5UiHgP01/8VAip8+sMSo+oiVdGoCVU2rPfVK2+MvQubLwwoe72Mwmv1US3j QCwA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d21si2168804pgd.544.2019.07.03.05.10.47; Wed, 03 Jul 2019 05:11:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726993AbfGCMId (ORCPT + 99 others); Wed, 3 Jul 2019 08:08:33 -0400 Received: from inva020.nxp.com ([92.121.34.13]:45716 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726910AbfGCMIc (ORCPT ); Wed, 3 Jul 2019 08:08:32 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 93E261A0006; Wed, 3 Jul 2019 14:08:30 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8647B1A036B; Wed, 3 Jul 2019 14:08:30 +0200 (CEST) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id F11F5205F0; Wed, 3 Jul 2019 14:08:29 +0200 (CEST) From: Abel Vesa To: Rob Herring , Mark Rutland , Shawn Guo , Leonard Crestez , Jacky Bai , Sascha Hauer Cc: Daniel Baluta , NXP Linux Team , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , Abel Vesa Subject: [PATCH v2] arm64: dts: imx8mm: Init rates and parents configs for clocks Date: Wed, 3 Jul 2019 15:08:22 +0300 Message-Id: <1562155702-29809-1-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the initial configuration for clocks that need default parent and rate setting. This is based on the vendor tree clock provider parents and rates configuration except this is doing the setup in dts rather than using clock consumer API in a clock provider driver. Signed-off-by: Abel Vesa --- Changes since v1: - removed the PCIE, CSI and DISP clocks parent setting since that should be done from their driver. arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 232a741..ba2034d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -451,6 +451,17 @@ <&clk_ext3>, <&clk_ext4>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; + assigned-clocks = <&clk IMX8MM_CLK_NOC>, + <&clk IMX8MM_CLK_AUDIO_AHB>, + <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>, + <&clk IMX8MM_SYS_PLL3>, + <&clk IMX8MM_VIDEO_PLL1>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>, + <&clk IMX8MM_SYS_PLL1_800M>; + assigned-clock-rates = <0>, + <400000000>, + <750000000>, + <594000000>; }; src: reset-controller@30390000 { -- 2.7.4