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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: e5dccded-1151-4e99-9260-08d700374458 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Jul 2019 04:22:47.2477 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: sthotton@marvell.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR18MB3118 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-07-04_02:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The NMI handlers handle_percpu_devid_fasteoi_nmi() and handle_fasteoi_nmi() added by commit 2dcf1fbcad35 ("genirq: Provide NMI handlers") do not update the interrupt counts. Due to that the NMI interrupt count does not show up correctly in /proc/interrupts. Update the functions to fix this. With this change, we can see stats of the perf NMI interrupts on arm64. Fixes: 2dcf1fbcad35 ("genirq: Provide NMI handlers") Signed-off-by: Shijith Thotton --- kernel/irq/chip.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 29d6c7d070b4..88d1e054c6ea 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -748,6 +748,8 @@ void handle_fasteoi_nmi(struct irq_desc *desc) unsigned int irq =3D irq_desc_get_irq(desc); irqreturn_t res; =20 + kstat_incr_irqs_this_cpu(desc); + trace_irq_handler_entry(irq, action); /* * NMIs cannot be shared, there is only one action. @@ -962,6 +964,8 @@ void handle_percpu_devid_fasteoi_nmi(struct irq_desc *d= esc) unsigned int irq =3D irq_desc_get_irq(desc); irqreturn_t res; =20 + __kstat_incr_irqs_this_cpu(desc); + trace_irq_handler_entry(irq, action); res =3D action->handler(irq, raw_cpu_ptr(action->percpu_dev_id)); trace_irq_handler_exit(irq, action, res); --=20 2.17.0