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Subject: [PATCH 6/6] drm/komeda: Expose side_by_side by sysfs/config_id
Thread-Topic: [PATCH 6/6] drm/komeda: Expose side_by_side by sysfs/config_id
Thread-Index: AQHVMjBc6ENIwv9q1EWZDI2YhrNJoA==
Date:   Thu, 4 Jul 2019 06:18:56 +0000
Message-ID: <20190704061717.6854-7-james.qian.wang@arm.com>
References: <20190704061717.6854-1-james.qian.wang@arm.com>
In-Reply-To: <20190704061717.6854-1-james.qian.wang@arm.com>
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There are some restrictions if HW works on side_by_side, expose it by
config_id to user for taking care them.

Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.=
com>
---
 drivers/gpu/drm/arm/display/include/malidp_product.h | 3 ++-
 drivers/gpu/drm/arm/display/komeda/komeda_dev.c      | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h b/drivers=
/gpu/drm/arm/display/include/malidp_product.h
index 1053b11352eb..96e2e4016250 100644
--- a/drivers/gpu/drm/arm/display/include/malidp_product.h
+++ b/drivers/gpu/drm/arm/display/include/malidp_product.h
@@ -27,7 +27,8 @@ union komeda_config_id {
 			n_scalers:2, /* number of scalers per pipeline */
 			n_layers:3, /* number of layers per pipeline */
 			n_richs:3, /* number of rich layers per pipeline */
-			reserved_bits:6;
+			side_by_side:1, /* if HW works on side_by_side mode */
+			reserved_bits:5;
 	};
 	__u32 value;
 };
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/=
drm/arm/display/komeda/komeda_dev.c
index 2aee735a683f..0fc7b9f6f649 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
@@ -82,6 +82,7 @@ config_id_show(struct device *dev, struct device_attribut=
e *attr, char *buf)
 	memset(&config_id, 0, sizeof(config_id));

 	config_id.max_line_sz =3D pipe->layers[0]->hsize_in.end;
+	config_id.side_by_side =3D mdev->side_by_side;
 	config_id.n_pipelines =3D mdev->n_pipelines;
 	config_id.n_scalers =3D pipe->n_scalers;
 	config_id.n_layers =3D pipe->n_layers;
--
2.20.1