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[209.132.180.67]) by mx.google.com with ESMTP id c15si6552921pfr.73.2019.07.04.17.42.49; Thu, 04 Jul 2019 17:43:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727696AbfGEAmA (ORCPT + 99 others); Thu, 4 Jul 2019 20:42:00 -0400 Received: from mga03.intel.com ([134.134.136.65]:40861 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727348AbfGEAmA (ORCPT ); Thu, 4 Jul 2019 20:42:00 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Jul 2019 17:41:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,453,1557212400"; d="scan'208";a="185074652" Received: from hao-dev.bj.intel.com ([10.238.157.65]) by fmsmga001.fm.intel.com with ESMTP; 04 Jul 2019 17:41:57 -0700 From: Wu Hao To: gregkh@linuxfoundation.org, mdf@kernel.org, linux-fpga@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-api@vger.kernel.org, atull@kernel.org, Wu Hao Subject: [PATCH v2 00/11] FPGA DFL updates Date: Fri, 5 Jul 2019 08:23:47 +0800 Message-Id: <1562286238-11413-1-git-send-email-hao.wu@intel.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Greg / Moritz This is v2 patchset which adds more features to FPGA DFL. This patchset is made on top of patch[1] and char-misc-next tree. Documentation patch for DFL is dropped from this patchset, and will resubmit it later to avoid conflict. Main changes from v1: - remove DRV/MODULE_VERSION modifications. (patch #1, #3, #4, #6) - remove argsz from new ioctls. (patch #2) - replace sysfs_create/remove_* with device_add/remove_* for sysfs entries. (patch #5, #8, #11) [1] [PATCH] fpga: dfl: use driver core functions, not sysfs ones. https://lkml.org/lkml/2019/7/4/36 Wu Hao (11): fpga: dfl: fme: support 512bit data width PR fpga: dfl: fme: add DFL_FPGA_FME_PORT_RELEASE/ASSIGN ioctl support. fpga: dfl: pci: enable SRIOV support. fpga: dfl: afu: add AFU state related sysfs interfaces fpga: dfl: afu: add userclock sysfs interfaces. fpga: dfl: add id_table for dfl private feature driver fpga: dfl: afu: export __port_enable/disable function. fpga: dfl: afu: add error reporting support. fpga: dfl: afu: add STP (SignalTap) support fpga: dfl: fme: add capability sysfs interfaces fpga: dfl: fme: add global error reporting support Documentation/ABI/testing/sysfs-platform-dfl-fme | 98 ++++++ Documentation/ABI/testing/sysfs-platform-dfl-port | 104 ++++++ drivers/fpga/Makefile | 3 +- drivers/fpga/dfl-afu-error.c | 225 +++++++++++++ drivers/fpga/dfl-afu-main.c | 328 +++++++++++++++++- drivers/fpga/dfl-afu.h | 7 + drivers/fpga/dfl-fme-error.c | 385 ++++++++++++++++++++++ drivers/fpga/dfl-fme-main.c | 93 +++++- drivers/fpga/dfl-fme-mgr.c | 110 ++++++- drivers/fpga/dfl-fme-pr.c | 50 ++- drivers/fpga/dfl-fme.h | 7 +- drivers/fpga/dfl-pci.c | 39 +++ drivers/fpga/dfl.c | 166 +++++++++- drivers/fpga/dfl.h | 54 ++- include/uapi/linux/fpga-dfl.h | 19 ++ 15 files changed, 1617 insertions(+), 71 deletions(-) create mode 100644 drivers/fpga/dfl-afu-error.c create mode 100644 drivers/fpga/dfl-fme-error.c -- 1.8.3.1