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Tue, 9 Jul 2019 10:33:18 +0000 Received: from MN2PR12MB3710.namprd12.prod.outlook.com ([fe80::8025:feba:c9cf:ba9f]) by MN2PR12MB3710.namprd12.prod.outlook.com ([fe80::8025:feba:c9cf:ba9f%3]) with mapi id 15.20.2052.020; Tue, 9 Jul 2019 10:33:18 +0000 From: Luis de Oliveira To: Rob Herring , Luis Oliveira CC: "p.zabel@pengutronix.de" , "mark.rutland@arm.com" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "Joao.Pinto@synopsys.com" , Gustavo Pimentel Subject: RE: [PATCH V2 2/2] dt-bindings: Document the DesignWare IP reset bindings Thread-Topic: [PATCH V2 2/2] dt-bindings: Document the DesignWare IP reset bindings Thread-Index: AQHVHH23e2+X/xsJsUq7VXVMGc6J2KbBuOcAgACOyjA= Date: Tue, 9 Jul 2019 10:33:18 +0000 Message-ID: References: <1559835388-2578-1-git-send-email-luis.oliveira@synopsys.com> <1559835388-2578-3-git-send-email-luis.oliveira@synopsys.com> <20190709015220.GA18239@bogus> In-Reply-To: <20190709015220.GA18239@bogus> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=lolivei@synopsys.com; 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received-spf: None (protection.outlook.com: synopsys.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: Ik+Y5CevsidhK5AiS0Uwpu2Goc53762sZ1qel0/nMvLdQKrflYiC2eF3wZADMsyz6T+aNbtidZv0JqaajZ2r6/N25U3va5ZWf2VYPOvdsPvz+3+IP5ZMNxuUgYUEUVsRXdAh5IhptbZFd6IX541EB4+8k5IkiQvv7uWg1d5BCyLV3sN2GATqrqHBB44cwIweXckehFNezdzm6+bs315QBibPFjaC61YKYZTUj2DvAPIUdA1kqc9fderuCqmDkzloytuJo4z/S7J65oENq9PQiogxmjc/cdxMiylUphvty7Df9hd/p2OHZdpFG44Gd7vZwUDW+V60Wp3jdp+W3SKAR9RCqS5OBIzfePxzGsNlxRAZO+ShYINLMo94whIk1+hgTZ92ubNjBTQDM4U6HTwWhBkmO/EYWXsrPsxl/xI0M+I= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 9977b52e-b334-484f-e5a5-08d70458db76 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Jul 2019 10:33:18.0920 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: c33c9f88-1eb7-4099-9700-16013fd9e8aa X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: lolivei@synopsys.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3133 X-OriginatorOrg: synopsys.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, Thank you for the comments, From: Rob Herring Date: Tue, Jul 09, 2019 at 02:52:20 > On Thu, Jun 06, 2019 at 05:36:28PM +0200, Luis Oliveira wrote: > > This adds documentation of device tree bindings for the > > DesignWare IP reset controller. > >=20 > > Signed-off-by: Gustavo Pimentel > > Signed-off-by: Luis Oliveira > > --- > > Changelog > > - Add active low configuration example > > - Fix compatible string in the active high example > >=20 > > .../devicetree/bindings/reset/snps,dw-reset.txt | 30 ++++++++++++++= ++++++++ > > 1 file changed, 30 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/snps,dw-res= et.txt > >=20 > > diff --git a/Documentation/devicetree/bindings/reset/snps,dw-reset.txt = b/Documentation/devicetree/bindings/reset/snps,dw-reset.txt > > new file mode 100644 > > index 0000000..85f3301 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/snps,dw-reset.txt > > @@ -0,0 +1,30 @@ > > +Synopsys DesignWare Reset controller > > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > + > > +Please also refer to reset.txt in this directory for common reset > > +controller binding usage. > > + > > +Required properties: > > + > > +- compatible: should be one of the following. > > + "snps,dw-high-reset" - for active high configuration > > + "snps,dw-low-reset" - for active low configuration >=20 > This is really a standalone block? >=20 > Are there versions of IP? >=20 We use this block because is is very simple. The Verilog is autogenerated=20 after an simple input configuration (APB config, reset pin number, active=20 high/low, etc) so it does not need versioning. We use it in almost all our testchips and prototyping, and it is a=20 standalone block. > > + > > +- reg: physical base address of the controller and length of memory ma= pped > > + region. > > + > > +- #reset-cells: must be 1. > > + > > +example: > > + > > + dw_rst_1: reset-controller@0000 { > > + compatible =3D "snps,dw-high-reset"; > > + reg =3D <0x0000 0x4>; > > + #reset-cells =3D <1>; > > + }; > > + > > + dw_rst_2: reset-controller@1000 {i > > + compatible =3D "snps,dw-low-reset"; > > + reg =3D <0x1000 0x8>; > > + #reset-cells =3D <1>; > > + }; > > --=20 > > 2.7.4 > >=20 Thank you Rob, Luis