Date: Thu, 1 Dec 2005 14:49:22 -0600
From: Terence Ripperda <tripperda@nvidia.com>
To: Jeff Garzik <jgarzik@pobox.com>
Cc: Linux Kernel <linux-kernel@vger.kernel.org>,
       Terence Ripperda <tripperda@nvidia.com>,
       Dave Airlie <airlied@gmail.com>
Subject: Re: PAT status?
Message-ID: <20051201204922.GT4365@hygelac>
Reply-To: Terence Ripperda <tripperda@nvidia.com>
References: <438CD4AD.9070806@pobox.com>
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Hi Jeff,

I unfortunately haven't had much time to look at the status of the PAT
code I had been working on. there are really 2 steps to the code:

the first is enabling and configuring the PAT registers. this then
allows a page table entry define that can be passed to traditional
interfaces, such as remap_page_range or change_page_attr. this is
pretty simple and we've been using a similar interface in our driver
for some time now.

the second part was to make sure we didn't create any cache aliasing
via duplicate mappings. this part is a bit more involved and what was
holding everything back. I've been meaning to get back to looking at
this, but really haven't had the time.

I don't know if you still want to limit the additional of the first
step, based on completion of the second step. I can try to set time
aside over the next month to try and sync up and take a look at where
we stand w/ the cachemap portion of the code. I think there where
still issues with gathering/passing in the correct attributes.

Thanks,
Terence


On Tue, Nov 29, 2005 at 05:22:37PM -0500, jgarzik@pobox.com wrote:
> 
> What's the status of PAT support?
> 
> I'm interested in that sort of stuff, for use with on-board GPUs such as 
> Intel/VIA/SiS, where system memory is used rather than offboard ram.
> 
> 	Jeff
> 
> 
> 
-
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