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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id w1sm733141pjt.30.2019.07.09.22.33.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Jul 2019 22:33:16 -0700 (PDT) Date: Tue, 9 Jul 2019 22:33:15 -0700 From: Kees Cook To: Linus Torvalds Cc: Thomas Gleixner , Ingo Molnar , Linux List Kernel Mailing , Borislav Petkov , Len Brown , Peter Zijlstra , Andrew Morton , "Rafael J. Wysocki" , Tony Luck , Jiri Kosina , Bob Moore , Erik Schmauss Subject: Re: [GIT PULL] x86/topology changes for v5.3 Message-ID: <201907092227.6ED4CB9C@keescook> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 09, 2019 at 10:15:21PM -0700, Linus Torvalds wrote: > On Tue, Jul 9, 2019 at 8:21 PM Linus Torvalds > wrote: > > > > Whee. It looks like it's bisecting to the same thing. Only partway > > done, but it feels very much like my desktop. > > Confirmed. > > With that config, I get this > > c21ac93288f0 (refs/bisect/bad) Merge tag 'v5.2-rc6' into x86/asm, to > refresh the branch > 8dbec27a242c (HEAD) x86/asm: Pin sensitive CR0 bits > 873d50d58f67 x86/asm: Pin sensitive CR4 bits > > ie those "pin sensitive bits" merge is bad, but before the commits is good. > > I think there is _another_ problem too, and maybe it's the APCI one, > but this one triggers some issue before the other issue even gets to > play.. Okay, fun. Thanks for confirming it. Well, I guess I get to try to find some more modern hardware to track this down. Does booting with init=/bin/sh get far enough to see if all the CPUs are online or anything like that? I'm baffled about the "gets mostly to userspace" part. I'd expect this to explode very badly if it misbehaved. Or maybe something gets confused between how many CPUs are expected and how many actually show up to the party. Hmmm. -- Kees Cook