Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp9148191ybi; Wed, 10 Jul 2019 05:31:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqzAN3MhScEQO1cYpZRdXgit1xwrHFcoaRcz0J+PXW8bvLpGLhlfOzy/Z1Lbvq83pK65LDaL X-Received: by 2002:a17:902:54f:: with SMTP id 73mr37867170plf.246.1562761906868; Wed, 10 Jul 2019 05:31:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562761906; cv=none; d=google.com; s=arc-20160816; b=rLqqUTyZhettsOT98bSHllwSDI+e+cpOoafl+UpL7XbkmSDRPHJdiKav6NpsIGgqGD /MRBVQzgVKs2f4kOdAt1oCZtNj3BoqRDRmB7tQq5jZdvfMorJLURW5NqzDvxTOdLzops mSf9z1E4GT+e6ERfHHidPDrkWJOJTapOrAqp6LwE5hWJVSNp30756trzqqOjRYKEfQHc Yx1O0lO/8xTD4PgA5DtAVP53j2DDMDzsUBp0Io7UOHKA4CS7D10s6mMLBlpMNFVO17f1 MHZS3eRM+VwOriGx44pYg0FE/DEgb7n5ZmLSE16vkgK+4xFsXcjpSpQjJQ7IQPzmLYte m0yA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:message-id:references :in-reply-to:subject:cc:to:from:date:content-transfer-encoding :mime-version; bh=DMSsSmmMxc3iXcCZkBZ8mYismtAQvIskdVJDgHjcfOo=; b=nBKKVxtYdXGgQwcR3To+I6p6zVW10QgtK2mk5RFhMMCHbaj6CTVthAQfQgfnDhSBjD uhK9Fp2+goTF4IKkhRd94VpDVMg4b2WI7notCs0Tn8alIBAXgks4JRl2Kc6/v2FLLCVq iANQV8ZOvmoGSUCrNPsXxSj2YuQgQt1DEq8zmmm23vzS1DYP/VcDVszBp7fofY0Ge3xX gnAAlBVjQzkp5zl278DvwD5pwNktZ59EwR6YWKxKSjfeNS83mFwvVBalNArKMG7tAv7B vzma3QTMBS/3KUYMhDa/DBIajEWUoT+VI8qFTVOx7XLiMI4oPCD3QIpSZrIPEKCYswQk rDKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c13si2011829plz.242.2019.07.10.05.31.31; Wed, 10 Jul 2019 05:31:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727063AbfGJMaE (ORCPT + 99 others); Wed, 10 Jul 2019 08:30:04 -0400 Received: from host-88-217-225-28.customer.m-online.net ([88.217.225.28]:1311 "EHLO mail.dev.tdt.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726097AbfGJMaE (ORCPT ); Wed, 10 Jul 2019 08:30:04 -0400 Received: from mail.dev.tdt.de (localhost [IPv6:::1]) by mail.dev.tdt.de (Postfix) with ESMTP id 2F9F9216E4; Wed, 10 Jul 2019 12:30:02 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Wed, 10 Jul 2019 14:30:02 +0200 From: Florian Eckert To: "Enrico Weigelt, metux IT consult" Cc: Eckert.Florian@googlemail.com, info@metux.net, dvhart@infradead.org, andy@infradead.org, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/3] platform/x86/pcengines-apuv2: add mpcie reset gpio export In-Reply-To: <3c469213-f2d7-aa7e-4028-e8ce463a4441@metux.net> References: <20190704090205.19400-1-fe@dev.tdt.de> <20190704090205.19400-2-fe@dev.tdt.de> <3c469213-f2d7-aa7e-4028-e8ce463a4441@metux.net> Message-ID: X-Sender: fe@dev.tdt.de User-Agent: Roundcube Webmail/1.1.5 X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.dev.tdt.de Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2019-07-08 21:44, Enrico Weigelt, metux IT consult wrote: > On 04.07.19 11:02, Florian Eckert wrote: >> On APUx we have also mpcie2/mpcie3 reset pins. To make it possible to >> reset >> the ports from the userspace, add the definition to this platform >> device. The gpio can then be exported by the legancy gpio subsystem to >> toggle the mpcie reset pin. > > Are you sure they're also available on APUv2 (not just v3) ? We have the following models on APU2 family: The schematic could be downloaded for all APU2 family boards from this side. See https://www.pcengines.ch/apu2.htm They all use the similar PCB with some minimal changes. APU2 2 mpcie slot apu2d0 (2 GB DRAM, 2 i211AT NICs) apu2d2 (2 GB DRAM, 3 i211AT NICs) apu2d4 (4 GB DRAM, 3 i210AT NICs) J14 (USB + SIM1) PE3_RST to GPIO G51 J13 (USB + SIM2) PE4_RST to GPIO G55 APU3 3 mpcie slot apu3c2 (2 GB DRAM, 3 i211AT NICs, optimized for 3G/LTE modems) apu3c4 (4 GB DRAM, 3 i211AT NICs, optimized for 3G/LTE modems) J16 (PCIe + USB no SIM) not connected to a userland GPIO J15 (USB SIM1) PE4_RST to GPIO G55 J14 (mSATA or USB SIM2) PE3_RST to GPIO G51 APU4 3 mpcie slot apu4c2 (2 GB DRAM, 4 i211AT NICs) apu4c4 (4 GB DRAM, 4 i211AT NICs) J15 (PCIe + USB no SIM) not connected to a userland GPIO J14 (USB SIM1) PE4_RST to GPIO G55 J13 (mSATA or USB SIM2) PE3_RST to GPIO G51 Please check again so that I have not done any mistake. So all USB only mpcie slots could be reseted by a GPIO G51 and G55. Kind regards Flo