Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp76164ybi; Thu, 11 Jul 2019 15:03:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqxIWV5NvYAdkJb3K/sH1qw4PE4X0+cm2jl8oihqNjauTwOwE6fUBCZTvbYysSHm7B2P1Zrk X-Received: by 2002:a65:5cca:: with SMTP id b10mr6867896pgt.365.1562882598471; Thu, 11 Jul 2019 15:03:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562882598; cv=none; d=google.com; s=arc-20160816; b=ta55HjSg1OVnf8sb9qP++mdnUsrV5XTLLt1qJdYz25Sq7tkAJXjP1AOraPTlI1GIMZ TAASckqjy8Am7ZONO3wuVe8LsUK3J4WTFq2CB7PJI2dwNCStq9/Zw2iz5C0F0UWumNES 5ZHGs0TEihB5rlvrYDM9uX+nenkneFPYvD+a7EMxZdFBNC8c5XXjM0+ayxWtHlUwvn+B H+zwsAoHFVOD7ZkbeVadaUswdnB3bXjk5qaTlOfJ2UZ9wJS3/jCrxvwDj8obibkfU737 diH9rPUiMVDKcOD/jPtJKzj4prRlFCKv4f4jgLqx7epsS+OTuuhHK3hktt8g60h5FRJa Knog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=zwiDkSzqhw+ieUNxmudRMKPd6fxiEBbh4MqW/RaAAEA=; b=pPr/GPsYVDrGavLACpxFVnfuj/pHUlWADREzKHXCk4l4vtARGa6y4dwwhP93Q1TGLF 62f7pGAFwt+HsIlN/FMf8Br78/fhQ4TqSYxv7URTDWUA85WSjN/n4hu9sgh46l9v2RLE fTCPx1XZV4uE1pI7/zHaXMHKYIM5jC9eZklDN8COj7QEeeOLloppbhUhb7lUtB08sbIn cYa1LsJ9wtaOpcSbbQw5Y6FgvfoD4HBdJb1s3eWCTKjMcAQ0d/RCxGdEX/t9IRtdj8Ac 0vAqSHzn/i14eWwbq1gh9oIibgnwu5gn/fU7X4mca+XB9nYiZ4YtTJJoWiJ08noFUCJG TNnw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d18si6386458pfn.202.2019.07.11.15.03.01; Thu, 11 Jul 2019 15:03:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728842AbfGKV2T (ORCPT + 99 others); Thu, 11 Jul 2019 17:28:19 -0400 Received: from gloria.sntech.de ([185.11.138.130]:36214 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726446AbfGKV2T (ORCPT ); Thu, 11 Jul 2019 17:28:19 -0400 Received: from ip5f5a6320.dynamic.kabel-deutschland.de ([95.90.99.32] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1hlgbu-0006n4-SN; Thu, 11 Jul 2019 23:28:14 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Douglas Anderson Cc: Thierry Reding , Sean Paul , linux-rockchip@lists.infradead.org, Laurent Pinchart , dri-devel@lists.freedesktop.org, Boris Brezillon , Ezequiel Garcia , Enric =?ISO-8859-1?Q?Balletb=F2?= , Rob Herring , mka@chromium.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v5 7/7] ARM: dts: rockchip: Specify rk3288-veyron-minnie's display timings Date: Thu, 11 Jul 2019 23:28:14 +0200 Message-ID: <10427933.3dknIRnSiX@diego> In-Reply-To: <20190401171724.215780-8-dianders@chromium.org> References: <20190401171724.215780-1-dianders@chromium.org> <20190401171724.215780-8-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Montag, 1. April 2019, 19:17:24 CEST schrieb Douglas Anderson: > Just like we did for rk3288-veyron-chromebook, we want to be able to > use one of the fixed PLLs in the system to make the pixel clock for > minnie. > > Specifying these timings matches us with how the display is used on > the downstream Chrome OS kernel. See https://crrev.com/c/323211. > > Unlike what we did for rk3288-veyron-chromebook, this CL actually > changes the timings (though not the pixel clock) that is used when > using the upstream kernel. Booting up a minnie shows that it ended up > with a 66.67 MHz pixel clock but it was still using the > porches/blankings it would have wanted for a 72.5 MHz pixel clock. > > NOTE: compared to the downstream kernel, this seems to cause a > slightly different result reported in the 'modetest' command on a > Chromebook. The downstream kernel shows: > 1280x800 60 1280 1298 1330 1351 800 804 822 830 66667 > > With this patch we have: > 1280x800 59 1280 1298 1330 1351 800 804 822 830 66666 > > Specifically modetest was reporting 60 Hz on the downstream kernel but > the upstream kernel does the math and comesup with 59 (because we > actually achieve 59.45 Hz). Also upstream doesn't round the Hz up > when converting to kHz--it seems to truncate. > > ALSO NOTE: when I look at the EDID from the datasheet, I see: > -hsync -vsync > ...but it seems like we've never actually run with that so I've > continued leaving that out. > > Signed-off-by: Douglas Anderson applied for 5.4 Thanks Heiko