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[209.132.180.67]) by mx.google.com with ESMTP id n11si6592486pgq.498.2019.07.11.20.32.47; Thu, 11 Jul 2019 20:33:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@aj.id.au header.s=fm3 header.b=Q90CrvOU; dkim=pass header.i=@messagingengine.com header.s=fm3 header.b=o+oDEYuM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729422AbfGLDc0 (ORCPT + 99 others); Thu, 11 Jul 2019 23:32:26 -0400 Received: from new4-smtp.messagingengine.com ([66.111.4.230]:45107 "EHLO new4-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728955AbfGLDcZ (ORCPT ); Thu, 11 Jul 2019 23:32:25 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailnew.nyi.internal (Postfix) with ESMTP id C10AC1B61; Thu, 11 Jul 2019 23:32:23 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 11 Jul 2019 23:32:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=8OTTrn15u+3N9 pDWV3Ka61zLndSduUjJwrYMM8MILms=; b=Q90CrvOUoebID2ta1bqq8kxPeT2hw 6PnXZ07fFtMufFlH0lypw7I3ASf2lleRSUO3xt3T70x41NHGsUmJ1VV3NvVAHZqD JRltB0BssjVGZzYBMcW5y9iOsa5lHdgiZafE+HbjNSesbt0Xul3vZBUaw1KIzmi/ WITjOZYrr9ecmtw0fIpI5VUIyeWBO8LXAtM5O+omlHXMacpf3QaL9ok1VVfiT18h LcFF5ogdYMD06XRSt0RDe4HjJDzyyVnOIeQ5BEm3FKEB2AX3pBB0ilWWbu7X+1zW OLz9JZoWTQVw8aSwlrr4oVs4q369QI9ToYOXAE/Sure+Y9H+wFPDYGb/w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=8OTTrn15u+3N9pDWV3Ka61zLndSduUjJwrYMM8MILms=; b=o+oDEYuM nBf8QPrJpDwucokTXM+LYxLYvzioci4sZ+UKx0JesDJnsB4VpU8BjZE5jITJfprQ AVqYUOcBodZIqX5VIAoQxuhdygEDhw64Uv7pTmwUM8tn6xFZEy49jg1X+UT3q4t0 Wd3wwkFnG0ZAx4TCyCnhAUE0PTN9PFnisYlJ4hSOU6bB8KedCwrFpoyU2XhwvBwC JCDPPWvvLiWYEknOcMx5DoYuBrYkaNBD3JMxge9fe0CFIWEsZnOm86U1xoWeeGOI mvzBYXV+g1AWq70DQ2ZGtjPndEZktE10mBey/GTmETvJcTduWUtvvr2ASuiJm39V vdGKzDduW1EDIg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduvddrgeelgdejfecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecunecujfgurhephffvufffkffojghfggfgsedtkeertd ertddtnecuhfhrohhmpeetnhgurhgvficulfgvfhhfvghrhicuoegrnhgurhgvfiesrghj rdhiugdrrghuqeenucffohhmrghinhepuggvvhhitggvthhrvggvrdhorhhgnecukfhppe dvtddvrdekuddrudekrdeftdenucfrrghrrghmpehmrghilhhfrhhomheprghnughrvgif segrjhdrihgurdgruhenucevlhhushhtvghrufhiiigvpedt X-ME-Proxy: Received: from mistburn.au.ibm.com (bh02i525f01.au.ibm.com [202.81.18.30]) by mail.messagingengine.com (Postfix) with ESMTPA id AC94B80060; Thu, 11 Jul 2019 23:32:19 -0400 (EDT) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Cc: Andrew Jeffery , ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, joel@jms.id.au, adrian.hunter@intel.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, ryanchen.aspeed@gmail.com Subject: [PATCH v2 1/2] dt-bindings: mmc: Document Aspeed SD controller Date: Fri, 12 Jul 2019 13:02:13 +0930 Message-Id: <20190712033214.24713-2-andrew@aj.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190712033214.24713-1-andrew@aj.id.au> References: <20190712033214.24713-1-andrew@aj.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if only a single slot is enabled. Signed-off-by: Andrew Jeffery --- In v2: * Rename to aspeed,sdhci.yaml * Rename sd-controller compatible * Add `maxItems: 1` for reg properties * Move sdhci subnode description to patternProperties * Drop sdhci compatible requirement * #address-cells and #size-cells are required * Prevent additional properties * Implement explicit ranges in example * Remove slot property .../devicetree/bindings/mmc/aspeed,sdhci.yaml | 90 +++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml new file mode 100644 index 000000000000..67a691c3348c --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED SD/SDIO/eMMC Controller + +maintainers: + - Andrew Jeffery + - Ryan Chen + +description: |+ + The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO + Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if + only a single slot is enabled. + + The two slots are supported by a common configuration area. As the SDHCIs for + the slots are dependent on the common configuration area, they are described + as child nodes. + +properties: + compatible: + enum: [ aspeed,ast2400-sd-controller, aspeed,ast2500-sd-controller ] + reg: + maxItems: 1 + description: Common configuration registers + ranges: true + clocks: + maxItems: 1 + description: The SD/SDIO controller clock gate + +patternProperties: + "^sdhci@[0-9a-f]+$": + type: object + properties: + compatible: + enum: [ aspeed,ast2400-sdhci, aspeed,ast2500-sdhci ] + reg: + maxItems: 1 + description: The SDHCI registers + clocks: + maxItems: 1 + description: The SD bus clock + interrupts: + maxItems: 1 + description: The SD interrupt shared between both slots + required: + - compatible + - reg + - clocks + - interrupts + +additionalProperties: false + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + +examples: + - | + #include + sdc@1e740000 { + compatible = "aspeed,ast2500-sd-controller"; + reg = <0x1e740000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e740000 0x10000>; + clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; + + sdhci0: sdhci@100 { + compatible = "aspeed,ast2500-sdhci"; + reg = <0x100 0x100>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&syscon ASPEED_CLK_SDIO>; + }; + + sdhci1: sdhci@200 { + compatible = "aspeed,ast2500-sdhci"; + reg = <0x200 0x100>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&syscon ASPEED_CLK_SDIO>; + }; + }; -- 2.20.1