Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp663268ybi; Fri, 12 Jul 2019 02:39:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqw3dzlQBFe6Tkw1L0HxLYbpXY4t+4VhTw34Ji2lCLAEGAg+hNy719fnVTHSWy7anvAzh+IA X-Received: by 2002:a17:90a:cb12:: with SMTP id z18mr10095000pjt.82.1562924365391; Fri, 12 Jul 2019 02:39:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562924365; cv=none; d=google.com; s=arc-20160816; b=U6d7nrN+sVvvW+Xg7VneLvHZtDnf4/bm9uXeYAFknexXCpUrFqDgIslrLCHH4emG3J F2jLmScfum6cqmRkE4Dh/+RkHF3qvcfZsWrQG+8bgeCCEGAQdqC2x4pOxGz2Em2FVSrj qNmlRZG/xOApWcLLhjsOsbDlMdvcFrKVp+Qce2DdfaY2RCgf6cBJaB0Rmo7YgynVQzmP i+EfFkZnjhOky/J2uRWWWtWDnQeyJdkw2f7XDdVM/Giz1EvTX6XitKGZD1i3NfilEZ1t Ma53++fdAgWF3Nj5xBPxqqeYWciQYUAgokWweRofiTmMvs9+wfmaYEmGgl9VJcwfTq8R yHJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=kL+jwHZxz2Dyc2Pdxvqa0h/FjFn3ZvWdQe8fmyuZ+S4=; b=Ccmb6fPyomywrxtvZUpWSJKMOd6Q/hw5QG5NXnWBmH5dHJ+ll/EYUGzB5qCrbHVfqk BTN4xX9z5Cki56znGriTf58KOeDShgvKxnPy/acIx0tbShJAVahDlilz6WOapzanQ4wm zs7M/71MXBn548Xib9Owx9wYoflF6eQ5SZ8O3Yq10Z0tqnlb5f6U+YutCvAUaAlJKyyH +Y07fKfs0GNZOqTBpdo9q2tjmm1XxERElQfEC4+KYzHVxbKE83mzQN5ks9KKWx9iqpEQ DtReDwCXtgLJ3clZHSRhjBc3U2CMn10im6Kx2C/OaCr5OKYyXT/ENa/TZJL+0/T6/C/7 5OlA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 36si7790226pla.80.2019.07.12.02.39.09; Fri, 12 Jul 2019 02:39:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726805AbfGLJiS (ORCPT + 99 others); Fri, 12 Jul 2019 05:38:18 -0400 Received: from ozlabs.ru ([107.173.13.209]:58432 "EHLO ozlabs.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726613AbfGLJiQ (ORCPT ); Fri, 12 Jul 2019 05:38:16 -0400 Received: from fstn1-p1.ozlabs.ibm.com (localhost [IPv6:::1]) by ozlabs.ru (Postfix) with ESMTP id 29E88AE807DE; Fri, 12 Jul 2019 05:30:01 -0400 (EDT) From: Alexey Kardashevskiy To: linux-kernel@vger.kernel.org Cc: "Oliver O'Halloran" , David Gibson , Sam Bobroff , Alistair Popple , Alexey Kardashevskiy Subject: [PATCH kernel v4 2/4] powerpc/iommu: Allow bypass-only for DMA Date: Fri, 12 Jul 2019 19:29:53 +1000 Message-Id: <20190712092955.56218-3-aik@ozlabs.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190712092955.56218-1-aik@ozlabs.ru> References: <20190712092955.56218-1-aik@ozlabs.ru> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org POWER8 and newer support a bypass mode which maps all host memory to PCI buses so an IOMMU table is not always required. However if we fail to create such a table, the DMA setup fails and the kernel does not boot. This skips the 32bit DMA setup check if the bypass is can be selected. Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson --- This minor thing helped me debugging next 2 patches so it can help somebody else too. --- arch/powerpc/kernel/dma-iommu.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c index a0879674a9c8..c963d704fa31 100644 --- a/arch/powerpc/kernel/dma-iommu.c +++ b/arch/powerpc/kernel/dma-iommu.c @@ -122,18 +122,17 @@ int dma_iommu_dma_supported(struct device *dev, u64 mask) { struct iommu_table *tbl = get_iommu_table_base(dev); - if (!tbl) { - dev_info(dev, "Warning: IOMMU dma not supported: mask 0x%08llx" - ", table unavailable\n", mask); - return 0; - } - if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) { dev->archdata.iommu_bypass = true; dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n"); return 1; } + if (!tbl) { + dev_err(dev, "Warning: IOMMU dma not supported: mask 0x%08llx, table unavailable\n", mask); + return 0; + } + if (tbl->it_offset > (mask >> tbl->it_page_shift)) { dev_info(dev, "Warning: IOMMU offset too big for device mask\n"); dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n", -- 2.17.1