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([2a00:1098:3142:14:3df0:c4c3:bb86:e0f3]) by smtp.gmail.com with ESMTPSA id k17sm5800070wrq.83.2019.07.12.05.20.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 Jul 2019 05:20:41 -0700 (PDT) Subject: Re: [PATCH] tty: amba-pl011: Make TX optimisation conditional To: Rogier Wolff , Dave Martin Cc: Russell King , Greg Kroah-Hartman , Jiri Slaby , "linux-serial@vger.kernel.org" , "linux-rpi-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" References: <1562852732-123411-1-git-send-email-phil@raspberrypi.org> <20190712112105.GH2790@e103592.cambridge.arm.com> <20190712121000.GK11350@BitWizard.nl> From: Phil Elwell Message-ID: <5bf03345-6a36-1b87-ca0c-e918b6030a74@raspberrypi.org> Date: Fri, 12 Jul 2019 13:20:42 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.2 MIME-Version: 1.0 In-Reply-To: <20190712121000.GK11350@BitWizard.nl> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:5.22.84,1.0.8 definitions=2019-07-12_04:2019-07-12,2019-07-12 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rogier, On 12/07/2019 13:10, Rogier Wolff wrote: > On Fri, Jul 12, 2019 at 12:21:05PM +0100, Dave Martin wrote: >> diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c >> index 89ade21..1902071 100644 >> --- a/drivers/tty/serial/amba-pl011.c >> +++ b/drivers/tty/serial/amba-pl011.c >> @@ -1307,6 +1307,13 @@ static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq); >> /* Start TX with programmed I/O only (no DMA) */ >> static void pl011_start_tx_pio(struct uart_amba_port *uap) >> { >> + /* >> + * Avoid FIFO overfills if the TX IRQ is active: >> + * pl011_int() will comsume chars waiting in the xmit queue anyway. >> + */ >> + if (uap->im & UART011_TXIM) >> + return; >> + > > I'm no expert on PL011, have no knowledge of the current bug, but have > programmed serial drivers in the past. > > This looks "dangerous" to me. > > The normal situation is that you push the first few characters into > the FIFO with PIO and then the interrupt will trigger once the FIFO > empties and then you can refil the FIFO until the buffer empties. > > The danger in THIS fix is that you might have a race that causes those > first few PIO-ed characters not to be put in the hardware resulting in > the interrupt never triggering.... If you can software-trigger the > interrupt just before the "return" here that'd be a way to fix things. I'm also not a serial driver expert, but I think this simplified patch is safe. The reason is that the UART011_TXIM flag is only set after the pio thread has failed to write some data into the FIFO because it is full, which would guarantee that an interrupt is generated once the fill level drops below the half-way mark. > I'm ok with a reaction like "I've thought about this, it's not a > problem, now shut up". I don't think that reaction would be justified - these things are difficult, and having many minds on the problem helps to avoid bugs like this. Phil