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[209.132.180.67]) by mx.google.com with ESMTP id t125si8098164pgt.344.2019.07.12.06.04.44; Fri, 12 Jul 2019 06:05:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="tn4/f9n/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727291AbfGLNEM (ORCPT + 99 others); Fri, 12 Jul 2019 09:04:12 -0400 Received: from mail.kernel.org ([198.145.29.99]:53006 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726449AbfGLNEL (ORCPT ); Fri, 12 Jul 2019 09:04:11 -0400 Received: from mail-qt1-f179.google.com (mail-qt1-f179.google.com [209.85.160.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 83496216C4; Fri, 12 Jul 2019 13:04:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1562936650; bh=j08i/yzt8yihm95wbKxIa8ANHeLTJGyB1LowMPZRoQs=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=tn4/f9n/k299HHdLN0F6ScJZKf/VYffpnnAYh+PPAzA7ZjRWQFYrqKf+oTQV+fuy4 ACXtzrbqpM/naLe0Cz/a11svW1mUDqExyut4Wh/u8EXdbSDYghpYV5xdCObec1WWpU LNbCdcMo3gwFzWE9scGST+eZVaGIXGMXzio+pSbQ= Received: by mail-qt1-f179.google.com with SMTP id k10so7990455qtq.1; Fri, 12 Jul 2019 06:04:10 -0700 (PDT) X-Gm-Message-State: APjAAAVWKooERTk+d1Vgk3uqzGGJJaXeOFEhtduVtdPg6v8XdYb3lO6I GLlMnQ+v9OfBMw/UKxIVh3xi2QbMAyh1cDJyog== X-Received: by 2002:a0c:b786:: with SMTP id l6mr6598069qve.148.1562936649734; Fri, 12 Jul 2019 06:04:09 -0700 (PDT) MIME-Version: 1.0 References: <20190712033214.24713-1-andrew@aj.id.au> <20190712033214.24713-2-andrew@aj.id.au> In-Reply-To: <20190712033214.24713-2-andrew@aj.id.au> From: Rob Herring Date: Fri, 12 Jul 2019 07:03:57 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 1/2] dt-bindings: mmc: Document Aspeed SD controller To: Andrew Jeffery Cc: linux-mmc , Ulf Hansson , Mark Rutland , Joel Stanley , Adrian Hunter , devicetree@vger.kernel.org, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , linux-aspeed@lists.ozlabs.org, "linux-kernel@vger.kernel.org" , Ryan Chen Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 11, 2019 at 9:32 PM Andrew Jeffery wrote: > > The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the > SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit > data bus if only a single slot is enabled. > > Signed-off-by: Andrew Jeffery > --- > In v2: > > * Rename to aspeed,sdhci.yaml > * Rename sd-controller compatible > * Add `maxItems: 1` for reg properties > * Move sdhci subnode description to patternProperties > * Drop sdhci compatible requirement > * #address-cells and #size-cells are required > * Prevent additional properties > * Implement explicit ranges in example > * Remove slot property > > .../devicetree/bindings/mmc/aspeed,sdhci.yaml | 90 +++++++++++++++++++ > 1 file changed, 90 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml Reviewed-by: Rob Herring