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[209.132.180.67]) by mx.google.com with ESMTP id c9si8037842pgp.72.2019.07.12.06.11.45; Fri, 12 Jul 2019 06:12:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727776AbfGLNK6 (ORCPT + 99 others); Fri, 12 Jul 2019 09:10:58 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:34769 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727620AbfGLNK6 (ORCPT ); Fri, 12 Jul 2019 09:10:58 -0400 X-Originating-IP: 86.250.200.211 Received: from localhost (lfbn-1-17395-211.w86-250.abo.wanadoo.fr [86.250.200.211]) (Authenticated sender: maxime.ripard@bootlin.com) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 7B19720004; Fri, 12 Jul 2019 13:10:28 +0000 (UTC) Date: Fri, 12 Jul 2019 15:10:28 +0200 From: Maxime Ripard To: Andrew Jeffery Cc: linux-mmc@vger.kernel.org, ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, joel@jms.id.au, adrian.hunter@intel.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, ryanchen.aspeed@gmail.com Subject: Re: [PATCH v2 1/2] dt-bindings: mmc: Document Aspeed SD controller Message-ID: <20190712131028.ba4d4jetg4btsx4u@flea> References: <20190712033214.24713-1-andrew@aj.id.au> <20190712033214.24713-2-andrew@aj.id.au> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="xetdl6arw4bwno7q" Content-Disposition: inline In-Reply-To: <20190712033214.24713-2-andrew@aj.id.au> User-Agent: NeoMutt/20180716 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --xetdl6arw4bwno7q Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, On Fri, Jul 12, 2019 at 01:02:13PM +0930, Andrew Jeffery wrote: > The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the > SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit > data bus if only a single slot is enabled. > > Signed-off-by: Andrew Jeffery > --- > In v2: > > * Rename to aspeed,sdhci.yaml > * Rename sd-controller compatible > * Add `maxItems: 1` for reg properties > * Move sdhci subnode description to patternProperties > * Drop sdhci compatible requirement > * #address-cells and #size-cells are required > * Prevent additional properties > * Implement explicit ranges in example > * Remove slot property > > .../devicetree/bindings/mmc/aspeed,sdhci.yaml | 90 +++++++++++++++++++ > 1 file changed, 90 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml > > diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml > new file mode 100644 > index 000000000000..67a691c3348c > --- /dev/null > +++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml > @@ -0,0 +1,90 @@ > +# SPDX-License-Identifier: GPL-2.0-or-later > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ASPEED SD/SDIO/eMMC Controller > + > +maintainers: > + - Andrew Jeffery > + - Ryan Chen > + > +description: |+ > + The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO > + Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if > + only a single slot is enabled. > + > + The two slots are supported by a common configuration area. As the SDHCIs for > + the slots are dependent on the common configuration area, they are described > + as child nodes. > + > +properties: > + compatible: > + enum: [ aspeed,ast2400-sd-controller, aspeed,ast2500-sd-controller ] > + reg: > + maxItems: 1 > + description: Common configuration registers > + ranges: true > + clocks: > + maxItems: 1 > + description: The SD/SDIO controller clock gate #address-cells and #size-cells have not been described here. > +patternProperties: > + "^sdhci@[0-9a-f]+$": > + type: object > + properties: > + compatible: > + enum: [ aspeed,ast2400-sdhci, aspeed,ast2500-sdhci ] > + reg: > + maxItems: 1 > + description: The SDHCI registers > + clocks: > + maxItems: 1 > + description: The SD bus clock > + interrupts: > + maxItems: 1 > + description: The SD interrupt shared between both slots > + required: > + - compatible > + - reg > + - clocks > + - interrupts > + > +additionalProperties: false But that means that it will generate a warning in your DT if you ever use them. > +required: > + - compatible > + - reg > + - "#address-cells" > + - "#size-cells" > + - ranges > + - clocks > + > +examples: > + - | > + #include > + sdc@1e740000 { > + compatible = "aspeed,ast2500-sd-controller"; > + reg = <0x1e740000 0x100>; > + #address-cells = <1>; > + #size-cells = <1>; Starting with your example. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --xetdl6arw4bwno7q Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXSiGxAAKCRDj7w1vZxhR xYJkAP9CaDPo8tTwjEFQXKOSYF7mEF3hSHXS+zEA3JKnm1lUkQD/QH5s8Xmp4PhP j8rUjn+aBCifFCOWkGDfhtf/XHiT1w4= =J++y -----END PGP SIGNATURE----- --xetdl6arw4bwno7q--