Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp1634578ybi; Fri, 12 Jul 2019 20:49:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqxmSlAqrRvPbYHJo8wsWQUkCt5E6jsKDBlnIka56CXltvG5k8zWYzgkbiwAJ6n+Xe45zFSG X-Received: by 2002:a63:6ecf:: with SMTP id j198mr14748013pgc.437.1562989748655; Fri, 12 Jul 2019 20:49:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562989748; cv=none; d=google.com; s=arc-20160816; b=RLmhYl49Q0LK5g1rYbNwv4C1ZBIH6ab82zEhJcLFWr6K/DvaD9+i53YdcWRwml1d9N fhIPqQl8GhgLYIyjMvQpUpkAmsCVejvh6nyjB21tbfX7EoHC+1r6bwGdT0Fseb+k9f5m 9XWHmC+Vcg8R/YbR61lStn/nGseMUz1LadP0CpP3XKvbyb8Mim9ZOeMX8IrUnNQqHBFR AsNH2DuTytIf8ybxNp+t0nN7sDKtrDJmZHeGYAM1dkRlbAv75KFvkU1Fs3IKW6HU76aP ONkul040m1n+npcIs33gBKuQVeOccNeK7oszo+AfIBCba/QNsfNyIO9trXoytzRz5f48 fKfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=gz6JEzAPlutsrpBKYgLyMF3PeZSl6mltlp8Zl1y+8TM=; b=TZgFpxq/YLV44hXrygHC/QT7eC/vW57sUm31DjzK5BNm06QYW5E1e9EXUFmYmqoj10 0NQQqsZRCrV9bpFl9s33I65qL1u/IZeCx4KOvH7RGkvGjq9UqkTN5esPwU+IARJeolMD 685befcQH1344Xln8l1dsOlWquPvzIABJwqhBEqA4qs5GZC2PyVg/uJb3kjYBLI7SBRq bCsUcUnBIsjJh4vjou4/0u9OyFvK/PjyYlMO04XJ2fkQAo40s45WVH+JmduUbTzfCUuc R14ayRHpZqTJHmhAQ75mUABSIyst3E1WwZKKsjRyDk0ucB+tqZD826xvHe8n/od+t+B8 5y1Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 61si9356369ple.275.2019.07.12.20.48.53; Fri, 12 Jul 2019 20:49:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727755AbfGMDsX (ORCPT + 99 others); Fri, 12 Jul 2019 23:48:23 -0400 Received: from hermes.aosc.io ([199.195.250.187]:42748 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727466AbfGMDsX (ORCPT ); Fri, 12 Jul 2019 23:48:23 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 97BAD6EAE7; Sat, 13 Jul 2019 03:48:18 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Linus Walleij Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v4 4/8] clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks Date: Sat, 13 Jul 2019 11:46:30 +0800 Message-Id: <20190713034634.44585-5-icenowy@aosc.io> In-Reply-To: <20190713034634.44585-1-icenowy@aosc.io> References: <20190713034634.44585-1-icenowy@aosc.io> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The MMC2 clock slices are currently not defined in V3s CCU driver, which makes MMC2 not working. Fix this issue. Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU") Signed-off-by: Icenowy Zheng --- New patch in v4. drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c index 4eb68243e310..9c88015d4419 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c @@ -513,6 +513,9 @@ static struct clk_hw_onecell_data sun8i_v3s_hw_clks = { [CLK_MMC1] = &mmc1_clk.common.hw, [CLK_MMC1_SAMPLE] = &mmc1_sample_clk.common.hw, [CLK_MMC1_OUTPUT] = &mmc1_output_clk.common.hw, + [CLK_MMC2] = &mmc1_clk.common.hw, + [CLK_MMC2_SAMPLE] = &mmc1_sample_clk.common.hw, + [CLK_MMC2_OUTPUT] = &mmc1_output_clk.common.hw, [CLK_CE] = &ce_clk.common.hw, [CLK_SPI0] = &spi0_clk.common.hw, [CLK_USB_PHY0] = &usb_phy0_clk.common.hw, -- 2.21.0