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From:   Abel Vesa <abel.vesa@nxp.com>
To:     Peng Fan <peng.fan@nxp.com>
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Subject: Re: [PATCH] clk: imx: imx8mm: fix audio pll setting
Thread-Topic: [PATCH] clk: imx: imx8mm: fix audio pll setting
Thread-Index: AQHVOrjKqRILo4kj1ESmmUTSG4SPJabLSCeA
Date:   Mon, 15 Jul 2019 07:27:48 +0000
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On 19-07-15 02:55:43, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
>=20
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
>=20
> Cc: <stable@vger.kernel.org>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Acked-by: Abel Vesa <abel.vesa@nxp.com>

> ---
>  drivers/clk/imx/clk-imx8mm.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>=20
> diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
> index 3a873e0e278f..b72bad064d8d 100644
> --- a/drivers/clk/imx/clk-imx8mm.c
> +++ b/drivers/clk/imx/clk-imx8mm.c
> @@ -55,8 +55,8 @@ static const struct imx_pll14xx_rate_table imx8mm_pll14=
16x_tbl[] =3D {
>  };
> =20
>  static const struct imx_pll14xx_rate_table imx8mm_audiopll_tbl[] =3D {
> -	PLL_1443X_RATE(786432000U, 655, 5, 2, 23593),
> -	PLL_1443X_RATE(722534400U, 301, 5, 1, 3670),
> +	PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
> +	PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
>  };
> =20
>  static const struct imx_pll14xx_rate_table imx8mm_videopll_tbl[] =3D {
> --=20
> 2.16.4
> =