Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp515038ybi; Tue, 16 Jul 2019 00:58:56 -0700 (PDT) X-Google-Smtp-Source: APXvYqze/ZPTWe/7jcWsTIxDq/PmOBIyo9A1cO9gM5tPOYkD0AjX6pO2xiU08rTMhhAuX34Gj9vJ X-Received: by 2002:a65:5882:: with SMTP id d2mr5062359pgu.134.1563263936324; Tue, 16 Jul 2019 00:58:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563263936; cv=none; d=google.com; s=arc-20160816; b=Us3ehhsZx5pjYa/gvLER6yXJ/LKHZFpe8SY23Q6GruUl2IGQckIC+hBRKGgT5y8Fgb aQ7u5YFdfzuIFoVGQQiHI2cQgC6ieSwzCOak0sHh7QaFA4cochbdXxVlPyixheyRGcLb oPZ7a5K+VoMIcqmqHA4DN+7xZ9whtngmsZCQD1+b4pIJ+rrq3UAtEubMtAQhk1r5M92M Bv8CPx73lS9CoByuFeIjQLK5IdpfE5hpmQhb0KyBHKip9B1ezli7R2nvTJXuJ65B7wux LM1P8HP5ODm/0pCN47sp3FK7BQ/lbXi2A70lophplfkLPK2QPXU8e3HMi7+GbPfy8a26 gYgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:user-agent:references :message-id:in-reply-to:subject:cc:to:from:date; bh=n1iSXc0GrOf5BqOyQS6TBYSmA389Lf56lrRc945wfp4=; b=uAf9DKbxlQnKjjymqHBdkomPbpY5TWOpafnsfPhEw0SgQHQVkTparvbW+9WgWaJ8Qz YcaP/7Hy1l8GJhKkE6V0gtEWub3aXhC2RlHXTZCXC68Be8xG+rFkCw1dg9aUQFIbCciR xaQASs+pE6Ij6mGL42t6Rs3yZks0mxCOrGr0oQcHrupG4atjsZs7+B0zlG0cm17D4aYw imcLYocyPmlySJyxWTj3T+4iphfht3X7AJHQx7GgCRSJW6dBHU2z2zuXlXsykKmW409V iW8axrzWXa5/jAH1yv0S3E+EVX8m2GDvh53ZmyeV/nuzz19wz9yC4IWuDJSY4MvYBrTE Livg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r12si17540pgm.473.2019.07.16.00.58.40; Tue, 16 Jul 2019 00:58:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730933AbfGPH5v (ORCPT + 99 others); Tue, 16 Jul 2019 03:57:51 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:49515 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727075AbfGPH5v (ORCPT ); Tue, 16 Jul 2019 03:57:51 -0400 Received: from pd9ef1cb8.dip0.t-ipconnect.de ([217.239.28.184] helo=nanos) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1hnILA-0001DC-9h; Tue, 16 Jul 2019 09:57:36 +0200 Date: Tue, 16 Jul 2019 09:57:35 +0200 (CEST) From: Thomas Gleixner To: Felipe Balbi cc: Richard Cochran , netdev@vger.kernel.org, Ingo Molnar , Borislav Petkov , "H . Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org, "Christopher S . Hall" Subject: Re: [RFC PATCH 1/5] x86: tsc: add tsc to art helpers In-Reply-To: <20190716072038.8408-2-felipe.balbi@linux.intel.com> Message-ID: References: <20190716072038.8408-1-felipe.balbi@linux.intel.com> <20190716072038.8408-2-felipe.balbi@linux.intel.com> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Felipe, On Tue, 16 Jul 2019, Felipe Balbi wrote: -ENOCHANGELOG As you said in the cover letter: > (3) The change in arch/x86/kernel/tsc.c needs to be reviewed at length > before going in. So some information what those interfaces are used for and why they are needed would be really helpful. > +void get_tsc_ns(struct system_counterval_t *tsc_counterval, u64 *tsc_ns) > +{ > + u64 tmp, res, rem; > + u64 cycles; > + > + tsc_counterval->cycles = clocksource_tsc.read(NULL); > + cycles = tsc_counterval->cycles; > + tsc_counterval->cs = art_related_clocksource; > + > + rem = do_div(cycles, tsc_khz); > + > + res = cycles * USEC_PER_SEC; > + tmp = rem * USEC_PER_SEC; > + > + do_div(tmp, tsc_khz); > + res += tmp; > + > + *tsc_ns = res; > +} > +EXPORT_SYMBOL(get_tsc_ns); > + > +u64 get_art_ns_now(void) > +{ > + struct system_counterval_t tsc_cycles; > + u64 tsc_ns; > + > + get_tsc_ns(&tsc_cycles, &tsc_ns); > + > + return tsc_ns; > +} > +EXPORT_SYMBOL(get_art_ns_now); While the changes look innocuous I'm missing the big picture why this needs to emulate ART instead of simply using TSC directly. Thanks, tglx